SPRUJG2 December 2024 AM62D-Q1
The EVM board contains 32GB of eMMC flash memory from Micron Part # MTFC32GBCAQTC connected to MMC0 port of the AM62D SoC.
The data bus from the flash memory is connected to 8 bits of the MMC0 interface supporting HS400 double data rates up to 200MHz. The Micron eMMC is a communication and mass data storage device that includes a Multimedia Card (MMC) interface and a NAND Flash component. Option to mount external pull up resistors are provided on DAT[7:1] to prevent bus floating and series resistor is provided for CLK signal close to SoC pad to match the characteristic impedance of PCB.
The eMMC device requires two power supplies, 3.3V for NAND memory and 1.8V for the eMMC interface. The MMC0 interface I/Os of the SoC is powered by the VDDSHV4 power domain, which is connected to 1.8V I/O supply.
The eMMC device requires active low reset from host. By default, the RST_n signal is temporarily disabled in the device. The host must set ECSD register byte 162, bits[1:0] to 0x1 to enable this functionality before the host can use it. The External Reset is provided by ANDing RESETSTATz from SoC and a GPIO from I/O Expander. A pull up is provided on GPIO pin to set the default active state.