SPRZ426F November 2014 – September 2024 DRA710 , DRA712 , DRA714 , DRA716 , DRA718 , DRA722 , DRA724 , DRA725 , DRA726
QSPI_SPI_CMD_REG [25:24] Masked from Read in RTL
Low
There is an integration error in the device. All WLEN (QSPI_SPI_CMD_REG[25:19]) bits in the QSPI_SPI_CMD_REG register are writeable. However, on a read the QSPI_SPI_CMD_REG[25:24] bits will be masked.
None.
DRA72x SR 2.0, 1.0
DRA71x SR 2.1, 2.0
DRA79x: 2.1, 2.0
TDA2Ex (23mm): 2.0, 1.0
TDA2Ex (17mm): 2.1, 2.0
AM571x: 2.1, 2.0, 1.0
AM570x: 2.1, 2.0
DRA72x: 2.0, 1.0
DRA71x: 2.1, 2.0