SPRZ428E November   2014  – September 2024 TDA2E

 

  1.   1
  2. 1Introduction
    1.     Related Documentation
    2.     Trademarks
    3.     Modules Impacted
  3. 2Silicon Advisories
    1.     Revisions SR 2.1, 2.0, 1.0 - Advisories List
    2.     i202
    3.     i378
    4.     i631
    5.     i694
    6.     i698
    7.     i699
    8.     i709
    9.     i727
    10.     i729
    11.     i734
    12.     i767
    13.     i782
    14.     i783
    15.     i802
    16.     i803
    17.     i807
    18.     i808
    19.     i809
    20.     i810
    21.     i813
    22.     i814
    23.     i815
    24.     i818
    25.     i819
    26.     i820
    27.     i824
    28.     i826
    29.     i829
    30.     i834
    31.     i849
    32.     i856
    33.     i862
    34.     i863
    35.     i867
    36.     i868
    37.     i869
    38.     i870
    39.     i871
    40.     i872
    41.     i874
    42.     i875
    43.     i878
    44.     i879
    45.     i880
    46.     i882
    47.     i883
    48.     i887
    49.     i889
    50.     i890
    51.     i893
    52.     i895
    53.     i896
    54.     i897
    55.     i898
    56.     i899
    57.     i900
    58.     i903
    59.     i904
    60.     i906
    61.     i913
    62.     i916
    63.     i927
    64.     i928
    65.     i929
    66.     i930
    67.     i932
    68.     i933
    69.     i2446
  4. 3Silicon Limitations
    1.     Revisions SR 2.1, 2.0, 1.0 - Limitations List
    2.     i596
    3.     i641
    4.     i833
    5.     i838
    6.     i844
    7.     i845
    8.     i848
    9.     i876
    10.     i877
    11.     i892
    12.     i909
  5. 4Silicon Cautions
    1.     Revisions SR 2.1, 2.0, 1.0 - Cautions List
    2.     i781
    3. 4.1 92
    4.     i827
    5.     i832
    6.     i836
    7.     i839
    8.     i864
    9.     i885
    10.     i886
    11.     i912
    12.     i918
    13.     i920
    14.     i926
    15.     i931
    16.     i934
    17. 4.2 106
  6. 5Revision History

i845

USB2.0 False Detection of Disconnect Condition

CRITICALITY

Low

DESCRIPTION

Per the standard, the 'Envelope detector' in the USB2.0 PHY must indicate High Speed disconnection when the amplitude of the differential signal at the downstream facing driver's connector is greater than or equal to 625 mV, and it must not be indicated when the signal amplitude is less than or equal to 525 mV at our connector. The default configuration of the USB1/USB2 phy is such that the detector circuit is monitoring the during the entire SOF frame and not just the last 8b portion of the extended EOP as indicated in the standard.

Due to this constant monitoring, it is possible that the PHY may falsely indicate disconnect condition due to reflections on the PCB. These reflections could exceed the disconnect thresholds if TI PCB layout guidelines for USB are not strictly followed.

WORKAROUND

SW Workaround: During USB2.0 PHY initialization, configure: bit 31 of 0x4A08 404C (USB1) or 0x4A08 504C (USB2) to =1b. This will limit detection window to the proper time and prevent false disconnect. TI PCB layout guidelines for USB should also be strictly followed to minimize reflections to within the thresholds defined in the standard. See device Data Manual for details.

REVISIONS IMPACTED

TDA2Ex (23mm) SR 2.0, 1.0
TDA2Ex (17mm) SR 2.1, 2.0

DRA79x: 2.1, 2.0

TDA2Ex (23mm): 2.0, 1.0

TDA2Ex (17mm): 2.1, 2.0

AM571x: 2.1, 2.0, 1.0

AM570x: 2.1, 2.0

DRA72x: 2.0, 1.0

DRA71x: 2.1, 2.0