SPRZ428E November   2014  – September 2024 TDA2E

 

  1.   1
  2. 1Introduction
    1.     Related Documentation
    2.     Trademarks
    3.     Modules Impacted
  3. 2Silicon Advisories
    1.     Revisions SR 2.1, 2.0, 1.0 - Advisories List
    2.     i202
    3.     i378
    4.     i631
    5.     i694
    6.     i698
    7.     i699
    8.     i709
    9.     i727
    10.     i729
    11.     i734
    12.     i767
    13.     i782
    14.     i783
    15.     i802
    16.     i803
    17.     i807
    18.     i808
    19.     i809
    20.     i810
    21.     i813
    22.     i814
    23.     i815
    24.     i818
    25.     i819
    26.     i820
    27.     i824
    28.     i826
    29.     i829
    30.     i834
    31.     i849
    32.     i856
    33.     i862
    34.     i863
    35.     i867
    36.     i868
    37.     i869
    38.     i870
    39.     i871
    40.     i872
    41.     i874
    42.     i875
    43.     i878
    44.     i879
    45.     i880
    46.     i882
    47.     i883
    48.     i887
    49.     i889
    50.     i890
    51.     i893
    52.     i895
    53.     i896
    54.     i897
    55.     i898
    56.     i899
    57.     i900
    58.     i903
    59.     i904
    60.     i906
    61.     i913
    62.     i916
    63.     i927
    64.     i928
    65.     i929
    66.     i930
    67.     i932
    68.     i933
    69.     i2446
  4. 3Silicon Limitations
    1.     Revisions SR 2.1, 2.0, 1.0 - Limitations List
    2.     i596
    3.     i641
    4.     i833
    5.     i838
    6.     i844
    7.     i845
    8.     i848
    9.     i876
    10.     i877
    11.     i892
    12.     i909
  5. 4Silicon Cautions
    1.     Revisions SR 2.1, 2.0, 1.0 - Cautions List
    2.     i781
    3. 4.1 92
    4.     i827
    5.     i832
    6.     i836
    7.     i839
    8.     i864
    9.     i885
    10.     i886
    11.     i912
    12.     i918
    13.     i920
    14.     i926
    15.     i931
    16.     i934
    17. 4.2 106
  6. 5Revision History

i782

SATA AHCI Command Issue Order

CRITICALITY

Low

DESCRIPTION

Advanced host controller Interface (AHCI) specification defines up to 32 command slots per port.

AHCI defines the highest priority slot as (pSlotLoc+1) mod MaxSlots, where pSlotLoc is the last slot from which a command was issued and MaxSlots is the number of slots per port (32 in this case).

The device implementation treats command slot 0 as the highest-priority slot and slot 31 as the lowest-priority slot.

Example:

Assuming that the last command was issued from slot 17 (and SATA_PxCI[31:0] CI contained 0 at an earlier time), when SATA_PxCI[31:0] CI is set to 0xFFFF FFFF, the command issue order should be 18, 19, 20 ... 31, 0, 1, 2 ... 17.

Instead, it is obseved 0, 1, 2, 3 ... 31.

This is a bug in the SATA controller.

WORKAROUND

No workaround is available. Implementation does not conform to AHCI specifications, but it does not affect a major functionality of SATA.

REVISIONS IMPACTED

TDA2Ex (23mm) SR 2.0, 1.0

TDA2Ex (23mm): 2.0, 1.0

AM571x: 2.1, 2.0, 1.0

DRA72x: 2.0, 1.0