SPRZ429N July 2014 – July 2024 AM5726 , AM5728 , AM5729
Power Management Enhancement Implemented Inside DSS Leads to DSS Underflows
Medium
An enhanced standby behavior is implemented inside DSS to avoid the usage of SW procedure, calculating the optimal DMA thresholds. This enhanced standby behavior allows DSS to go into standby even for cases where the threshold values programmed are non-optimal.
A bug is identified in this implementation, which causes DSS underflows when DSS is in smart-standby mode and when multiple pipelines are enabled.
An additional bit (bit 0) has been added to DISABLE_MSTANDBY_ENHANCEMENT register (physical address: 0x58001858) to enable(0x0)/disable(0x1) the enhanced standby behavior.
Setting DISABLE_MSTANDBY_ENHANCEMENT[0] bit to '1' (disables the enhanced standby behavior) and prevents the occurrence of this bug.
SR 2.0, 1.1
TDA2x: 2.0, 1.1, 1.0
DRA75x, DRA74x: 2.0, 1.1, 1.0
AM572x: 2.0, 1.1