SPRZ429N July 2014 – July 2024 AM5726 , AM5728 , AM5729
SoC Will Hang If Region 5 Accessed While CTRL_CORE_MMR_LOCK_5 Is Locked
Medium
CTRL_CORE_MMR_LOCK_5 register has unexpected behavior.
There are five registers used to lock different memory regions of CTRL_MODULE_CORE memory space. A memory region is locked, means that all write accesses to this region are ignored. Writing a value unique for each register will lock certain memory region and writing another unique value results in unlocking of the same region.
The functionality of CTRL_CORE_MMR_LOCK_5 register is different than the other 4 registers.
If a write access to “locked” registers, which belong to MMR_LOCK_5 region is performed, all of the Control Module registers become inaccessible. Any write access to locked registers in MMR_LOCK_5 region leads to an error in Control Module interface bus.
Therefore, the write access is not only ignored but also blocks further access to the Control Module forever.
For accessing Control Module's configuration registers belonging to MMR_LOCK_5 region by CTRL_CORE_MMR_LOCK_5 register the following sequence must be used:
SR 2.0, 1.1
TDA2x: 2.0, 1.1, 1.0
DRA75x, DRA74x: 2.0, 1.1, 1.0
AM572x: 2.0, 1.1