SPRZ429N July 2014 – July 2024 AM5726 , AM5728 , AM5729
QSPI_SPI_CMD_REG [25:24] Masked from Read in RTL
Low
There is an integration error in the device. All WLEN (QSPI_SPI_CMD_REG[25:19]) bits in the QSPI_SPI_CMD_REG register are writeable. However, on a read the QSPI_SPI_CMD_REG[25:24] bits will be masked.
None.
SR 2.0, 1.1
TDA2x: 2.0, 1.1, 1.0
DRA75x, DRA74x: 2.0, 1.1, 1.0
AM572x: 2.0, 1.1