SPRZ452I july 2018 – may 2023 AM6526 , AM6528 , AM6546 , AM6548
On-Chip Debug: The Assertion of Warm Reset Coinciding with a Debug Configuration Access Targeting the STM Subsystem May Result in a Hang of Said Debug Configuration Access
AM65x SR 2.1, SR 2.0, SR 1.0
Debug configuration transaction initiators and targets are typically susceptible only to power-on-resets. The STM Subsystem includes the Arm® STM500 and a CoreSight™ CTI that provides triggering support. The orthogonal debug interconnect for the STM Subsystem is affected by warm reset. This results in the possibility of a hang of a debug configuration access that is active when warm reset is active..
There is no workaround for this issue. The user needs to be aware of the possibility that a debug configuration hang may result in the rare case that the STM Subsystem is being configured while warm reset is active.