SPRZ457I January 2021 – December 2024 AM2431 , AM2432 , AM2434 , AM6411 , AM6412 , AM6421 , AM6422 , AM6441 , AM6442
CPSW: Device lockup when reading CPSW registers
A device lockup can occur during the second read of any CPSW subsystem register after any MAIN domain power on reset (POR). A MAIN domain POR occurs using the hardware MCU_PORz signal, or via software using CTRLMMR_RST_CTRL.SW_MAIN_POR or CTRLMMR_MCU_RST_CTRL.SW_MAIN_POR. After these resets, the processor and internal bus structures may get into a state which is only recoverable with full device reset using MCU_PORz.
Due to this errata, Ethernet boot should not be used on this device.
To avoid the lockup, a warm reset should be issued after a MAIN domain POR and before any access to the CPSW registers. The warm reset realigns internal clocks and prevents the lockup from happening. The warm reset should be triggered using CTRLMMR_MCU_RST_CTRL.SW_MCU_WARMRST. This will issue a warm reset to the entire device (both MCU and MAIN domains), and the device will re-initiate the boot process. Note that reset status bits distinguishing cold and warm resets would not be useful due to this workaround.
If M4F is used as a safety processor, please consult your TI representative for workaround information.
If the application never accesses any CPSW register, this errata does not apply.
There is no workaround for Ethernet boot from CPSW0. Ethernet should not be used as a boot source on affected devices