SPRZ491D december 2020 – june 2023 DRA821U , DRA821U-Q1
Boot: SPI and xSPI BOOTMODE Pin Mapping changes for SR2.0
The SPI and xSPI BOOTMODE pin mappings are changed between silicon revisions SR1.0 and SR2.0 (to align with other J7 Family device bootmode definitions), per the following table:
Primary Boot Mode B Pin | Primary Boot Mode A Pins | (merge left) | (merge left) | Boot Mode Selected for SR1.0 | Boot Mode Selected for SR2.0 |
---|---|---|---|---|---|
MCU 5 | MCU 4 | MCU 3 | |||
0 | 0 | 1 | 1 | SPI | xSPI |
1 | 1 | 1 | 0 | xSPI | SPI |
Configure the BOOTMODE pins per the above table to select the desired Boot Mode for each Silicon Revision.