Arvind Sridhar
In today’s world, most highly integrated systems serve more than one function and are designed to interface with other systems and peripheral devices. In addition, the same piece of hardware is often re-configured to suit the needs of various regions or end-users, thereby reducing the amount of inventory overhead for equipment manufacturers. The average end user is usually unaware of changes at the core of these systems, including - the mode of operation of the integrated circuits (ICs), which control the functionality of the end equipment. In this post, I will address an important feature of clock and timing ICs that provides the “heartbeat” or reference frequency for highly integrated systems. I like to call this feature “pin-selectable personality.” In a nutshell, a pin-selectable personality is a device’s ability to take on different configurations (personalities) depending on the state of its external control pins.
Before exploring potential scenarios for these pin-selectable personalities, let’s review the different ways you can store a power-on-reset (POR) configuration in a clocking device. Device configurations selected using external control pins are typically stored in nonvolatile memory (NVM). The simplest memory option is a mask read-only memory (ROM), which is a type of ROM whose contents are hard-coded during the integrated circuit (IC) manufacturing process. While the main advantage of a mask ROM is its low cost per bit of storage, its one-time masking cost is high. Generating a mask ROM to support a new configuration requires IC redesign, fabrication, assembly and testing, and is often not a quick process. Continuously evolving system requirements demand faster product design cycle times.
The second option is a one-time programmable (OTP) NVM that is programmed only once after IC manufacturing by blowing fuses at each bit. In comparison to mask ROM NVM discussed earlier, configuring this form of NVM is often quicker. As the name implies, you can write to OTP NVM only once. This limitation during system prototyping could negatively impact project schedules.
An elegant solution to these problems exists in the form of nonvolatile electrically erasable programmable ROM (EEPROM), which gives you the flexibility to quickly try out different configurations during the prototype phase of your design cycle. EEPROM NVMs give clocking devices the flexibility to take on different pin-selectable personalities.
Figure 1 highlights the five most important system-level benefits of using clocking solutions with integrated EEPROM NVMs.
Below, I will expand on each of these five benefits shown in Figure 1:
Let’s now review a real-life application scenario where a clock generator IC with integrated EEPROM NVM offers the system benefits highlighted above:
Table 1 shows an EEPROM configuration plan for the LMK03328 ultra-high-performance clock generator. The pin-strapping GPIO2 and GPIO3 pins on the clocking device can select region specific video frequencies, the central processing unit (CPU) and Ethernet clocks as shown in the table. The table also highlights configurations where you could margin the CPU clock frequency by +/-5%.
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I hope that I have sparked some curiosity about clocking devices with mask ROM and integrated EEPROM NVM, providing cost-effectiveness and flexibility. My favorite high-performance clock generator is the LMK03328. Other popular choices are the CDCM6208 and CDCE949.
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