SWCU185G January 2018 – June 2024 CC1312PSIP , CC1312R , CC1352P , CC1352R , CC2642R , CC2642R-Q1 , CC2652P , CC2652PSIP , CC2652R , CC2652RB , CC2652RSIP , CC2662R-Q1
The UART module provides four I/O signals to be routed to the DIOs. The following signals are selected through the IOCFGn registers in the IOC module.
CTS and RTS lines are active low.
IOC must be configured before enabling UART, or unwanted transitions on input signals may confuse UART on incoming transactions. When IOC is configured as UART-specific I/Os (RXD, CTS, TXD, or RTS), IOC sets static output driver enable to the DIO (output driver enable = 1 for output TXD and RTS and output driver enable = 0 for inputs RXD and CTS).
To enable and initialize the UART, use the following steps:
PRCMPeripheralRunEnable(uint32_t), PRCMPeripheralSleepEnable(uint32_t), PRCMPeripheralDeepSleepEnable(unit32_t)
and loading the setting to the clock controller by writing to the PRCM:CLKLOADCTL register or by using the function
PRCMLoadSet().
This section discusses the steps required to use a UART module. For this example, the UART clock is assumed to be 24 MHz, and the desired UART configuration is the following:
The first thing to consider when programming the UART is the BRD because the UART:IBRD and UART:FBRD registers must be written before the UART:LCRH register. The BRD can be calculated using the equation described in Section 22.4.2.
The result of 2 indicates that the UART:IBRD DIVINT field must be set to 13 decimal or 0xD. Equation 7 calculates the value to be loaded into the UART:FBRD register.
With the BRD values available, the UART configuration is written to the module in the following order: