SWCU185G January 2018 – June 2024 CC1312PSIP , CC1312R , CC1352P , CC1352R , CC2642R , CC2642R-Q1 , CC2652P , CC2652PSIP , CC2652R , CC2652RB , CC2652RSIP , CC2662R-Q1
The radio CPU signals events back to the system CPU using firmware defined interrupts. Table 26-181 lists the interrupts to be used by the proprietary commands. Each interrupt may be enabled individually in the system CPU. Section 26.10.4 and Section 26.10.5 give details about when the interrupts are generated.
Interrupt Number | Interrupt Name | Description |
---|---|---|
0 | COMMAND_DONE | A radio operation command has finished |
1 | LAST_COMMAND_DONE | The last radio operation command in a chain of commands has finished |
10 | TX_ENTRY_DONE | For transmission of packets with unlimited length: Reading from a TX entry is finished |
16 | RX_OK | Packet received with CRC OK, payload, and not to be ignored |
17 | RX_NOK | Packet received with CRC error |
18 | RX_IGNORED | Packet received with CRC OK, but to be ignored |
22 | RX_BUF_FULL | Packet received that did not fit in RX buffer |
23 | RX_ENTRY_DONE | RX queue data entry changing state to Finished |
24 | RX_DATA_WRITTEN | Data written to partial read RX buffer |
25 | RX_N_DATA_WRITTEN | Specified number of bytes written to partial read RX buffer |
26 | RX_ABORTED | Packet reception stopped before packet was done |
28 | SYNTH_NO_LOCK | The synthesizer has reported loss of lock |
29 | MODULES_UNLOCKED | As part of the boot process, the Arm Cortex-M0 processor has opened access to RF core modules and memories |
30 | BOOT_DONE | The RF core CPU boot is finished |
31 | INTERNAL_ERROR | The radio CPU has observed an unexpected error |