SWCU185G January 2018 – June 2024 CC1312PSIP , CC1312R , CC1352P , CC1352R , CC2642R , CC2642R-Q1 , CC2652P , CC2652PSIP , CC2652R , CC2652RB , CC2652RSIP , CC2662R-Q1
This section identifies the requirements of initializing the interfacing modules when the TRNG is to be used for the first time after a device reset. Table 19-2 lists the Initialization of interfacing modules.
Interfacing Module | Comment |
---|---|
PRCM | TRNG module interface clock must be enabled. See PRCM registers, PRCM:PDCTL0.PERIPH_ON and PRCM:SECDMACLKGR.TRNG_CLK_EN in Section 8.8.2. |
Arm® Cortex®-M4F | NVIC configuration must be done to enable the interrupt from the TRNG. Only needed for interrupt based communication. |
Interconnect | Interconnect must be enabled for communication with TRNG, which is handled in the PRCM as a consequence of many settings like CPU in run, sleep, or deep sleep mode, usage of DMA, I2S, RFCORE, and Crypto engine. |