SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
The I/O buffer and mode-control register (AESCTL) specifies the mode of operation for the AES engine.
Internal operation of the AES module can be interrupted by setting all mode bits to 0 and writing zeroes to the length registers (AESDATALEN0, AESDATALEN1, and AESAUTHLEN [see Section 13.9.1]).
The length registers write the length values to the AES module. While processing, the length values decrement to 0. If both lengths are 0, the data stream is finished and a new context is requested. For basic AES modes (ECB, CBC, and CTR), a crypto length of 0 can be written if multiple streams must be processed with the same key. Writing a 0 length results in continued data requests until a new context is written. For the other modes (CBC-MAC, GCM, and CCM), no new data requests are done if the length decrements to or equals 0.
TI recommends writing a new length per packet. If the length registers decrement to 0, no new data is processed until a new context or length value is written.
When writing a new mode without writing the length registers, the values of the length register from the previous context are reused.