SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
Table 8-4 lists the system clock descriptions and possible sources.
Clock | Description | Possible sources |
---|---|---|
SCLK_LF | Low frequency clock
|
Selectable in [DDI_0_OSC:CTL0.SCLK_LF_SRC_SEL] |
SCLK_MF | Medium frequency clock
| 2 MHz RC oscillator |
SCLK_HF | High frequency clock
|
Selectable in [DDI_0_OSC:CTL0.SCLK_HF_SRC_SEL] |
SCLK_LF_AUX | Used for low-power comparator in AUX_PD (COMP_B) and as clock to the recharge comparator in REFSYS | Same as SCLK_LF |
ACLK_ADC | Used as clock source for ADC | Same as SCLK_HF |
ACLK_REF | Used as start and stop source for time-to-digital converter (TDC) |
Selectable in [DDI_0_OSC:CTL0.ACLK_REF_SRC_SEL] |
ACLK_TDC | Used as clock for TDC |
Selectable in [DDI_0_OSC:CTL0.ACLK_TDC_SRC_SEL] |
When the 48 MHz crystal oscillator is enabled (by selecting XOSCHF as source for SCLK_HF), the XOSCHF must not be turned off, or SCLK_HF source must not be changed to another source, before the XOSCHF is reported as stable and switched to. The XOSCHF is stable when the DDI_0_OSC:STAT0.PENDINGSCLKHFSWITCHING is asserted after starting the crystal. DriverLib API should be used to switch SCLK_HF source, and interrupts must be disabled while doing so.
If 31.25 kHz derived from the 48 MHz crystal oscillator is selected as the SCLK_LF source, the device must not be allowed to enter Standby mode. If the device goes to Standby with the 48 MHz crystal oscillator running, the oscillator may stop, putting the device in an unresponsive state. If the DC/DC regulator is also used, stopping the 48 MHz regulator may lead to permanent damage of the device.