SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
cJTAG commands are conveyed through benign JTAG scan activity.
The following are three basic steps:
Before cJTAG commands are issued, the controller must ensure the scan activity will not initiate any unexpected actions in the device. To accomplish this, an inert opcode such as BYPASS or IDCODE must be loaded into the instruction register. Normally bypass is used, because its value (all ones) is dictated by the IEEE 1149.1 specification.
Command detection is enabled by performing two zero bit scans (ZBS), then a 1-bit shift. A ZBS is defined as a scan sequence that traverses through the Capture DR state and eventually the Update DR state without ever touching the Shift DR state. The scan sequence can enter Pause DR state for any number of clocks, or skip the Pause DR state altogether. Each successive ZBS increments the control level. The control level is locked when the first Shift DR state occurs.
When the control level is locked, commands are issued by pairs of DR scans, and sometimes a third DR scan. The number of clocks spent in the Shift DR state is counted for each scan (from 0 to 31 clocks). The first DR scan, command part 0 (CP0) forms the opcode of the command. The second DR scan, command part 1 (CP1), provides additional information about the command. This may be more opcode bits or a data field, depending upon the opcode.
There are three commands (SCNB, SCNS, and CIDA) that require a third DR scan, command part 2 (CP2), to transport data in or out of the device. Table 7-4 lists the commands.
| OPCODE | Instruction | ||
|---|---|---|---|
| 00000 | STMC Store Miscellaneous Control Operand: bbbxy | ||
| bbb | |||
| 0 | State control | ||
| xy | |||
| 0 | NOP | ||
| 1 | ExitCmdLev (ECL) | ||
| 2 | Exit/suspend (SUSPEND = 1) | ||
| 3 | ZBS Inhibit (ZBSINH = 1) | ||
| 1 | Scan control | ||
| x | |||
| 0 | Scan Group Candidate (SGC) SGC = y | ||
| 1 | Conditional Group Member (CGM) CGM = y | ||
| 2 | Ready Control RDYC = xy With a scan format other than the MScan Scan Format, the number of logic 1 RDY bits preceding the last bit of the SP payload is xy + 1 | ||
| 3 | Delay Control (DLYC) DLYC = xy | ||
| xy | |||
| 0 | No DTS delay is added. | ||
| 1 | Add one TCKC signal period. | ||
| 2 | Add two TCKC signal periods. | ||
| 3 | Add a variable number of TCKC signal periods. | ||
| 4–7 | Reserved | ||
| 00001 | STC1 Store Conditional 1 bit Operand: cbbbv | ||
| bbb | |||
| 0 | Sampling Edge (SEDGE) Defines the TCKC signal edge used to sample the TMSC signal input | ||
| SEDGE==0: | Sample the TMSC signal with the TCKC signal falling edge | ||
| SEDGE==1: | Sample the TMSC signal with the TCKC signal rising edge | ||
| c | |||
| 0 | SEDGE = v | ||
| 1 | SEDGE = v if CGM == 1 | ||
| 1–7 | Reserved | ||
| 00010 | STC2 Store Conditional 2 bit Operand: cbbvv | ||
| bb | |||
| 0–1 | Reserved | ||
| 2 | Auxiliary Pin Function Control (APFC) | ||
| APFC==00: | No change in the default pin function. | ||
| APFC==01: | The pin function becomes the standard pin function. | ||
| APFC==1x: | The pin function becomes the auxiliary pin function. | ||
| C | |||
| 0 | APFC = vv | ||
| 1 | APFC = vv if CGM == 1 | ||
| 3 | Reserved | ||
| 00011 | STFMT Store Scan Format Operand: nnnnn | ||
| nnnnn | |||
| 0 | JSCAN0 | ||
| 1 | JSCAN1 | ||
| 2 | JSCAN2 | ||
| 3 | JSCAN3 | ||
| 4–7 | Reserved | ||
| 8 | OSCAN0 | ||
| 9 | OSCAN1 | ||
| 10 | OSCAN2 | ||
| 11 | OSCAN3 | ||
| 12 | OSCAN4 | ||
| 13 | OSCAN5 | ||
| 14 | OSCAN6 | ||
| 15 | OSCAN7 | ||
| 16 | Reserved | ||
| 00100 | MSS Make Scan Selection Operand: miiii | ||
| m | |||
| 0 | SGC bit of the targeted controller is set SGC bit of a non-targeted controller is cleared | ||
| 1 | SGC bit of the targeted controller is set SGC bit of a non-targeted controller is not affected | ||
| 00101–00110 | Reserved | ||
| 00111 | CCE Conditional Command Enable Operand: miiii | ||
| m | |||
| 0 | CGM bit of the targeted controller is set CGM bit of a non-targeted controller is cleared | ||
| 1 | CGM bit of the targeted controller is set CGM bit of a non-targeted controller is not affected | ||
| 01000 | SCNB Scan Bit Operand: yyyyy + CR Scan | ||
| yyyyy | |||
| 00 | SGC, Scan Group Candidate, write | ||
| 01 | CGM, Conditional Group Member, write | ||
| 02–05 | CNFG0-3, TAP.7 Controller class, read | ||
| 06–31 | Reserved | ||
| 01001–11111 | Reserved | ||