SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
Automatic phase transition requires that the setup phase needs less than 17 sample clock periods to charge the S-H capacitor to the target voltage. This is generally not the case when the Reference DAC drives an external load.
Configure the automatic phase control with the sequence as follows:
The transition sets the AUX_EVCTL:EVSTAT3.AUX_DAC_HOLD_ACTIVE event.