SWCU192 November 2021 CC1312R7 , CC1352P7 , CC2652P7 , CC2652R7
7.10 Boundary Scan
The CC13x2x7 and CC26x2x7 devices use standard boundary scan as defined under the IEEE 1149.1 JTAG standard. Each DIO has a dedicated boundary scan cell that contains six registers (two each for output pins, bidirectional control pins, and input pins), as shown in Figure 7-13.
Figure 7-13 Boundary Scan CellOf the six registers, three are shift registers and the other three are update registers. The shift registers are in a scan chain and connect across all the DIOs. There are few muxes inside each Boundary Scan Register cell that select between the test data and the functional data. The boundary scan implementation is intended to cover both DC parametric tests as well as IODFT testing. The 32 DIOs available in the CC13x2x7 and CC26x2x7 devices are categorized under different groups that are based on test pin muxing and tester-contacted and non-contacted I/Os. For further information regarding boundary scan I/O across different packages, see Table 7-25.
| Pin Name | Tap Interface | Group |
|---|---|---|
| TCK | TAP_SCAN_CLOCK | |
| TMS | TAP_SCAN_MODE | |
| DIO0 | grp1 | |
| DIO1 | grp1 | |
| DIO2 | grp1 | |
| DIO3 | grp1 | |
| DIO4 | grp1 | |
| DIO5 | grp1 | |
| DIO6 | grp1 | |
| DIO7 | grp1 | |
| DIO8 | grp1 | |
| DIO9 | grp1 | |
| DIO10 | grp1 | |
| DIO11 | grp1 | |
| DIO12 | grp1 | |
| DIO13 | grp1 | |
| DIO14 | grp1 | |
| DIO15 | grp1 | |
| DIO16 | TAP_SCAN_OUT | grp3 |
| DIO17 | TAP_SCAN_IN | grp3 |
| DIO18 | grp1 | |
| DIO19 | grp1 | |
| DIO20 | grp1 | |
| DIO21 | grp1 | |
| DIO22 | grp1 | |
| DIO23 | grp2 | |
| DIO24 | grp2 | |
| DIO25 | grp1 | |
| DIO26 | grp1 | |
| DIO27 | grp1 | |
| DIO28 | grp1 | |
| DIO29 | grp1 | |
| DIO30 | grp1 |
DC Parametric is tested using boundary scan access to each DIO.
- For input-type DC parametric tests:
- Configure all I/Os (except DIO2) into input mode by driving the bidirectional control pin to 1.
- Test for VIL by applying low voltage to all BIDIs other than the status output pin (DIO2).
- Capture the response on input BSR registers and shift out the captured data on DIO2 using INTEST instruction.
- Any pin that did not meet VIL specifications will cause the status output to go to 1.
- Repeat the same for VIH by applying high voltage to all BIDIs other than the status output pin (DIO2).
To test IIH and IIL, the previously discussed steps are required. Instead of voltage, however, current must be measured. To test the VIL and VIH of the status output, select the other DIO as the status output, mask out all other pins, and repeat the test. This feature is not comprehended in the boundary scan implementation, but can be achieved using memory map control of DIOs.
- For output DC parametric tests:
- Configure all I/Os (except DIO1) into output mode by driving the bidirectional control pin to 0.
- Shift-in 0s to all the I/Os through DIO1.
- Measure VOL on all pins using EXTEST instruction.
- Repeat the same by shifting 1s to all the I/Os through DIO1.
- Measure VOH on all pins.
To test IOH and IOL, the same steps as previously discussed are required. However instead of voltage, current must be measured. To test VOL and VOH, test the status output, select the other DIO and repeat the test. This feature is not comprehended in the boundary scan implementation, but can be achieved using memory map control of DIOs.