SWCU194 March 2023 CC1314R10 , CC1354P10 , CC1354R10 , CC2674P10 , CC2674R10
Memory programming is done using TI provided API. When calling the API functions, all interrupts that would trigger an access to the FLASH memory bank being written/erased should be disabled.
During a FLASH memory write or erase operation, the FLASH memory bank being written/erased should not be read. If instruction execution is required during a FLASH memory operation, the executing code must be placed in the other FLASH Memory bank not undergoing write/erase or in SRAM (and executed from SRAM) while the FLASH write/erase operation is in progress.