SWCU194 March 2023 CC1314R10 , CC1354P10 , CC1354R10 , CC2674P10 , CC2674R10
Table 2-179 lists the memory-mapped registers for the CPU_SIG registers. All register offset addresses not listed in Table 2-179 should be considered as reserved locations and the register contents should not be modified.
Offset | Acronym | Register Name | Section |
---|---|---|---|
0h | STIR | Provides a mechanism for software to generate an interrupt | Section 2.5.9.1 |
Complex bit access types are encoded to fit into small table cells. Table 2-180 shows the codes that are used for access types in this section.
Access Type | Code | Description |
---|---|---|
Read Type | ||
R | R | Read |
Write Type | ||
W | W | Write |
Reset or Default Value | ||
-n | Value after reset or the default value |
STIR is shown in Table 2-181.
Return to the Summary Table.
Provides a mechanism for software to generate an interrupt
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
31-9 | RESERVED | R | 0h | Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior. |
8-0 | INTID | W | 0h | Indicates the interrupt to be pended. The value written is (ExceptionNumber - 16) |