SWCU194 March 2023 CC1314R10 , CC1354P10 , CC1354R10 , CC2674P10 , CC2674R10
The CRYPTO:HASHDATAINn and CRYPTO:HASHDIGESTA to CRYPTO:HASHDIGESTP data registers are typically accessed through DMA and not with host writes and reads. However, to support debugging, continuation of hash operations, and HMAC, the Data Input and Digest registers can be accessed through host write and read operations. The registers buffer the input and output data blocks to and from the crypto core.
Writes (both DMA and host) to the Data Input registers load the input buffer for the Hash engine. For message lengths larger than 64 bytes, multiple blocks of data are written to this input buffer using a handshake via flags of the CRYPTO:HASHIOBUFCTRL register. All blocks except the last are required to be a full block size in bits (512 bits for SHA-224 and SHA-256, 1024 bits for SHA-384 and SHA-512). If the last block is not a full block, only the least significant bits of data have to be written, but they have to be padded with zeroes to the next 32-bit boundary.
When writing the Data Input registers using the host (and not the DMA), the RFD_IN, DATA_IN_AV, and PAD_MESSAGE bits of HASHIOBUFCTRL are used to determine when writes to the Data Input registers are allowed, when input is ready for processing by the hash engine, and how the hash engine should handle padding, respectively.
The Digest registers may be read by the DMA or host. When read by the host, the GET_DIGEST bit of the HASHIOBUFCTRL register must be written to a 1, to instruct the Hash engine to output the digest value. OUTPUT_FULL bit of HASHIOBUFCTRL is used by the hash engine to indicate that the Digest registers contain new values for reading. After the digest is read, the OUTPUT_FULL bit must be written to a 1 value to allow the Hash engine to process additional inputs.
Intermediate (non-finalized) hash digest values may be read from the Digest registers and then later written back to the Digest registers in order to extend a hash operation with additional input data.
Algorithm | Data Input Block Size | Digest Output Size |
---|---|---|
SHA-224 | 512 bits (HASHDATAIN0 through HASHDATAIN15 | 224 bits (HASHDIGESTA through HASHDIGESTG) |
SHA-256 | 512 bits (HASHDATAIN0 through HASHDATAIN15) | 256 bits (HASHDIGESTA through HASHDIGESTH) |
SHA-384 | 1024 bits
(HASHDATAIN0 through HASHDATAIN31) |
384 bits (HASHDIGESTA through HASHDIGESTL) |
SHA-512 | 1024 bits (HASHDATAIN0 through HASHDATAIN31) | 512 bits (HASHDIGESTA through HASHDIGESTP) |