SWRA680 November   2020 CC3100 , CC3120 , CC3135 , CC3200 , CC3220R , CC3220S , CC3220SF , CC3235S , CC3235SF

 

  1.   Abstract
  2.   Trademarks
  3. 1Crystal Oscillator Basics
    1. 1.1 Crystal Oscillator Model
  4. 2Crystal Selection
    1. 2.1 Crystal Mode of Operation
    2. 2.2 Temperature Tolerance
    3. 2.3 Aging (Long-Term Stability)
    4. 2.4 Crystal ESR
    5. 2.5 Frequency Accuracy
    6. 2.6 Drive Level
    7. 2.7 Selecting a crystal
      1. 2.7.1 Crystal Specifications
      2. 2.7.2 Recommended Crystals for the CC31xx and CC32xx
  5. 3Crystal Tuning
    1. 3.1 The importance of Crystal Tuning
    2. 3.2 Load Capacitance
    3. 3.3 Crystal Tuning With CL
  6. 4Measuring the ppm Error for the Fast Clock (High Frequency)
    1. 4.1 Setting Up for the CC3x00 Devices
    2. 4.2 Setting Up for the CC3x20 and CC3x35 Devices
    3. 4.3 Measuring ppm Frequency Error
  7. 5PCB Layout Guidelines
    1. 5.1 The 32.768-kHz Crystal (Slow Clock)
    2. 5.2 The 40-MHz Crystal (Fast Clock)
  8. 6References

3.2 Load Capacitance

The load capacitance (CL) refers to the net capacitance in the oscillator feedback loop. The correct load capacitance is essential to ensure the oscillation frequency of the crystal is within the expected range. The load capacitance is equal to the amount of capacitance seen between the crystal pins, and it includes the shunt capacitors added on the board, the PCB trace parasitic capacitance, the component pad capacitance, device pin capacitance, and so forth.

GUID-20200807-CA0I-254J-N8M0-FPHJGMBWQJFQ-low.png Figure 3-1 Simplified Crystal Equivalent Load Capacitance Circuit

Figure 3-2 illustrates a typical crystal oscillator circuit and sources of load capacitance. The total load capacitance includes discrete load capacitors (CL1 and CL2), device pin capacitance (CPIN), and stray board capacitance (CSTRAY). It is important to account for all sources of capacitance when calculating value for the discrete capacitor components, CL1 and CL2, in Equation 2 for a specific board design.

Equation 2. GUID-20200807-CA0I-WPSC-MXZ2-DRBTBFQGCDRC-low.gif

These capacitors, with any parasitic capacitance in the PCB and the crystal terminals, compose the total load capacitance (CL) that helps set the crystal resonance frequency. The crystal data sheet provides the optimum load capacitance CL for the crystal. This total CL typically consists of both the loading capacitors and the parasitic capacitance of the layout and packaging.

The following presents the relative advantages of crystals with different CL values. The disadvantages of lower CL are as follows:

  • Crystals with CL < 8-pF are more difficult to source with short lead times
  • Frequency becomes more sensitive to changes in board capacitance as CL decreases.
  • Lowering CL results in degraded RF phase noise.

Advantages of lower CL are as follows:

  • Lower CL causes a much faster start-up time. (Start-up time goes as )
  • Lower CL causes a faster amplitude control loop response time.
  • Lower CL makes it easier to use small size crystals (2.0 × 1.6 and so on) and maintain a start-up time at or less than 400 μs. Start-up time worsens with smaller crystals due to an increase in LM.