SWRA760A April   2023  – April 2024 AWR2544 , AWR2944

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Definitions, Abbreviations, Acronyms
  5. 2Introduction
  6. 3Basic Bootloader Flow
    1. 3.1 Boot Flow Introduction
    2. 3.2 Preparing the Application for Boot
      1. 3.2.1 SBL Image Format
      2. 3.2.2 Signing Scripts
    3. 3.3 ROM Boot
      1. 3.3.1 Boot mode - SFLASH
        1. 3.3.1.1 Image Load Sequence
        2. 3.3.1.2 Boot Mode UART
          1. 3.3.1.2.1 Image Download Sequence
    4. 3.4 SBL Boot
      1. 3.4.1 R5 SBL Flash Offset
      2. 3.4.2 R5 SBL Image Size
  7. 4Conclusion
  8. 5Revision History

Preparing the Application for Boot

Shown below are the different steps that are done to convert the compiler+linker generated application .out into a format designed for flashing and booting.

  • For each CPU, the compiler+linker toolchain is used to create the application .out "ELF" file which can be loaded and run via CCS/ JTAG IDE.
  • The below "post build" steps are then used to convert the application .out into a "flash" friendly format
    • For each CPU, out2rpc converts the application executable (.out) into custom TI RPRC (.rprc) image. This tool strips out the initialized sections from the executable file (*.out) and places them in a compact format that the SBL can understand. The output RPRC file is typically much smaller than the original executable (*.out) file.
    • multiCoreGen is then used to combine all the RPRC files per CPU into a single .appimage file which is a concatenation of the individual CPU specific RPRC files.
  • This .appimage can then be flashed to the device.
GUID-C6DB7495-3E27-4463-B108-EF89C64A6723-low.png Figure 3-1 Post Build Steps