SWRA779 September   2023 CC3300 , CC3301

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Main Features
    1. 2.1 Dual Host Interface
    2. 2.2 Shared Host Interface
    3. 2.3 Autonomous Mode
    4. 2.4 Host Interrupt
      1. 2.4.1 Out-of-Band Interrupt
      2. 2.4.2 In-Band Interrupt
  6. 3Interfaces
    1. 3.1 Introduction
    2. 3.2 SDIO Interface
      1. 3.2.1 SDIO Overview
      2. 3.2.2 SDIO Flow Control
    3. 3.3 SPI Interface
      1. 3.3.1 SPI Overview
      2. 3.3.2 SPI Configuration
      3. 3.3.3 SPI Flow Control
    4. 3.4 Uart Interface
      1. 3.4.1 UART Overview
      2. 3.4.2 UART Configuration
      3. 3.4.3 UART Flow Control
    5. 3.5 Pin Count Options
  7. 4Host Communication
    1. 4.1 Protocol Overview
    2. 4.2 SDIO Wrapper
    3. 4.3 SPI Wrapper
  8. 5Boot Flow
    1. 5.1 SDIO
    2. 5.2 SPI

3.2.1 SDIO Overview

Table 3-7 lists the characteristics of the SDIO host interface.

Table 3-1 SDIO Interface Characteristics
Characteristics Description
SDIO version High Speed SDIOv2 and some implementations of SDIOv3
Max frequency 50 MHz
Data bus 4 bits SDIO (1 bit SDIO is also supported)
Max baud rate 200Mbps (4 bits @50MHz)
I/O voltage levels 1.8 V

Table 3-4 lists the signals of the SDIO host interface.

Table 3-2 SDIO Interface Signals
Signal Name Source Description
CLK Controller Serial bit clock
CMD Controller Command line
DAT0-DAT3 Controller/Peripheral Data lines