SWRA779 September   2023 CC3300 , CC3301

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Main Features
    1. 2.1 Dual Host Interface
    2. 2.2 Shared Host Interface
    3. 2.3 Autonomous Mode
    4. 2.4 Host Interrupt
      1. 2.4.1 Out-of-Band Interrupt
      2. 2.4.2 In-Band Interrupt
  6. 3Interfaces
    1. 3.1 Introduction
    2. 3.2 SDIO Interface
      1. 3.2.1 SDIO Overview
      2. 3.2.2 SDIO Flow Control
    3. 3.3 SPI Interface
      1. 3.3.1 SPI Overview
      2. 3.3.2 SPI Configuration
      3. 3.3.3 SPI Flow Control
    4. 3.4 Uart Interface
      1. 3.4.1 UART Overview
      2. 3.4.2 UART Configuration
      3. 3.4.3 UART Flow Control
    5. 3.5 Pin Count Options
  7. 4Host Communication
    1. 4.1 Protocol Overview
    2. 4.2 SDIO Wrapper
    3. 4.3 SPI Wrapper
  8. 5Boot Flow
    1. 5.1 SDIO
    2. 5.2 SPI

3.5 Pin Count Options

Table 3-10 summarizes all possible pin count options. Note that 1-bit SDIO mode has not been tested yet.

Table 3-10 Pin Count Options
Configuration Wi-Fi BLE Interrupt #pins
Dual Interface 4 bits SDIO UART OOB 6 (Wi-Fi) + 1 (OOB interrupt) + 4 (BLE) = 11 pins
Dual Interface 1-bit SDIO UART OOB 3 (Wi-Fi) + 1 (OOB interrupt) + 4 (BLE) = 8 pins
Shared Interface 4 bits SDIO N/A IB 6 (Wi-Fi/BLE) = 6 pins
Dual Interface SPI UART OOB 4 (Wi-Fi) + 1 (OOB interrupt) + 4 (BLE) = 9 pins