SWRA782 October   2023 CC1311P3 , CC1311R3 , CC1312PSIP , CC1312R , CC1312R7 , CC1314R10 , CC1352P , CC1352P7 , CC1352R , CC1354P10

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Overview
    1. 1.1 Acronyms
    2. 1.2 Regulatory Compliance
      1. 1.2.1 TI 15.4 Stack
      2. 1.2.2 Regulatory Body
        1. 1.2.2.1 SUB 1
          1. 1.2.2.1.1 ETSI
          2. 1.2.2.1.2 ARIB
          3. 1.2.2.1.3 FCC
    3. 1.3 Polite Spectrum Access Timing Parameters
      1. 1.3.1 2.4 GHz
      2. 1.3.2 Coexistence
  5. 2Reference Examples
    1. 2.1 Available Chipsets
    2. 2.2 Flash and RAM Allocation
  6. 3Software Block Diagram
  7. 4Network Features
    1. 4.1 15.4 Supported PHYS
    2. 4.2 15.4 Device Architecture
    3. 4.3 15.4 Network Topology
      1. 4.3.1 Supported Network Modes
      2. 4.3.2 Beacon-Enabled Mode
      3. 4.3.3 Non Beacon-Enabled Mode
      4. 4.3.4 Frequency Hopping Mode
  8. 5Security
  9. 6Performance and Test Data
    1. 6.1 Test Data
    2. 6.2 Large Network Stability Tests
      1. 6.2.1 Sub1G
      2. 6.2.2 2.4 GHz
    3. 6.3 Transmission Rate
      1. 6.3.1 One Sensor Network
      2. 6.3.2 Five Sensor Network
      3. 6.3.3 47- Sensor Network
  10. 7Out-of-the Box-Experience
  11. 8Tools
    1. 8.1 Code Composer Studio
    2. 8.2 Sysconfig
    3. 8.3 Packet Sniffer
    4. 8.4 Battery Life Calculator
    5. 8.5 Linux

4.2 15.4 Device Architecture

Simplelink devices can be used in different architectures. They can act as stand-alone device. In this architecture, the application and the protocol stack are running on the SimpleLink devices as single chip solution.

This reduces the cost of the system, but it is limited in performance and memory utilization metrics. The standalone architecture can be tested with the Sensor and Collector example provided in the Simplelink SDK.

An alternative architecture that can be used, is the coprocessor in which the Simplelink devices are used to run only the protocol stack. In this mode the NPI over a UART connection can be used to communicate to a dedicated application processor using the API-interface. A more detailed description of this interface can be found within the TI-15.4-Stack CoP Interface guide. The Coprocessor mode can be tested using the TI 15.4-Stack- Linux Gateway Project Zero example in the SimpleLink academy.

The difference between these architectures are shown in Figure 4-1.

GUID-20230613-SS0I-PPNM-KHHF-VN1T88DSSVN3-low.svg Figure 4-1 Differences Between These Architectures