SWRS212B May 2017 – April 2018 IWR1642
PRODUCTION DATA.
NO. | PARAMETER | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
1 | tc(SPC)M | Cycle time, SPICLK(4) | 25 | 256tc(VCLK) | ns | ||
2(4) | tw(SPCH)M | Pulse duration, SPICLK high (clock polarity = 0) | 0.5tc(SPC)M – 4 | 0.5tc(SPC)M + 4 | ns | ||
tw(SPCL)M | Pulse duration, SPICLK low (clock polarity = 1) | 0.5tc(SPC)M – 4 | 0.5tc(SPC)M + 4 | ||||
3(4) | tw(SPCL)M | Pulse duration, SPICLK low (clock polarity = 0) | 0.5tc(SPC)M – 4 | 0.5tc(SPC)M + 4 | ns | ||
tw(SPCH)M | Pulse duration, SPICLK high (clock polarity = 1) | 0.5tc(SPC)M – 4 | 0.5tc(SPC)M + 4 | ||||
4(4) | td(SPCH-SIMO)M | Delay time, SPISIMO valid before SPICLK low, (clock polarity = 0) | 0.5tc(SPC)M – 3 | ns | |||
td(SPCL-SIMO)M | Delay time, SPISIMO valid before SPICLK high, (clock polarity = 1) | 0.5tc(SPC)M – 3 | |||||
5(4) | tv(SPCL-SIMO)M | Valid time, SPISIMO data valid after SPICLK low, (clock polarity = 0) | 0.5tc(SPC)M – 10.5 | ns | |||
tv(SPCH-SIMO)M | Valid time, SPISIMO data valid after SPICLK high, (clock polarity = 1) | 0.5tc(SPC)M – 10.5 | |||||
6(5) | tC2TDELAY | Setup time CS active until SPICLK high
(clock polarity = 0) |
CSHOLD = 0 | 0.5*tc(SPC)M + (C2TDELAY + 2)*tc(VCLK) – 7 | 0.5*tc(SPC)M + (C2TDELAY+2) * tc(VCLK) + 7.5 | ns | |
CSHOLD = 1 | 0.5*tc(SPC)M + (C2TDELAY + 2)*tc(VCLK) – 7 | 0.5*tc(SPC)M + (C2TDELAY+2) * tc(VCLK) + 7.5 | |||||
Setup time CS active until SPICLK low
(clock polarity = 1) |
CSHOLD = 0 | 0.5*tc(SPC)M + (C2TDELAY+2)*tc(VCLK) – 7 | 0.5*tc(SPC)M + (C2TDELAY+2) * tc(VCLK) + 7.5 | ||||
CSHOLD = 1 | 0.5*tc(SPC)M + (C2TDELAY+3)*tc(VCLK) – 7 | 0.5*tc(SPC)M + (C2TDELAY+3) * tc(VCLK) + 7.5 | |||||
7(5) | tT2CDELAY | Hold time, SPICLK low until CS inactive (clock polarity = 0) | (T2CDELAY + 1) *tc(VCLK) – 7.5 | (T2CDELAY + 1) *tc(VCLK) + 7 | ns | ||
Hold time, SPICLK high until CS inactive (clock polarity = 1) | (T2CDELAY + 1) *tc(VCLK) – 7.5 | (T2CDELAY + 1) *tc(VCLK) + 7 |