The AWR1843AOP is an Antenna-On-Package device capable of operation in the 76- to 81GHz band. The device is built with TI’s low-power 45-nm RFCMOS process and enables unprecedented levels of integration in an extremely small form factor. The AWR1843AOP is an ideal solution for low-power, self-monitored, ultra-accurate radar systems in the automotive space.
It integrates a DSP subsystem, which contains TI's high-performance C674x DSP for the Radar Signal processing. The device includes a BIST processor subsystem, which is responsible for radio configuration, control, and calibration. Additionally the device includes a user programmable Arm Cortex-R4F based for automotive interfacing. The Hardware Accelerator block (HWA) can perform radar processing and can offload the DSP in order to execute higher level algorithms. Simple programming model changes can enable a wide variety of sensor applications with the possibility of dynamic reconfiguration for implementing a multimode sensor. Additionally, the device is provided as a complete platform solution including reference hardware design, software drivers, sample configurations, API guide, and user documentation.
PART NUMBER | PACKAGE(1) | BODY SIZE | TRAY / TAPE AND REEL |
---|---|---|---|
AWR1843ARBGALPQ1 | FCBGA (180) | 15 mm × 15 mm | Tray |
AWR1843ARBGALPRQ1 | FCBGA (180) | 15 mm × 15 mm | Tape and Reel |
AWR1843ARBSALPQ1 | FCBGA (180) | 15 mm × 15 mm | Tray |
AWR1843ARBSALPRQ1 | FCBGA (180) | 15 mm × 15 mm | Tape and Reel |
Figure 3-1 is functional block diagram for the device.
Table 4-1 shows a comparison between devices, highlighting the differences.
FUNCTION | AWR6843AOP | AWR1843AOP(1) | AWR1843 | AWR1642 | AWR1443 | |
---|---|---|---|---|---|---|
Antenna on Package (AOP) | Yes | Yes | — | — | — | |
Number of receivers | 4 | 4 | 4 | 4 | 4 | |
Number of transmitters | 3(4) | 3(4) | 3(4) | 2 | 3 | |
RF frequency range | 60 to 64 GHz | 76 to 81 GHz | 76 to 81 GHz | 76 to 81 GHz | 76 to 81 GHz | |
On-chip memory | 1.75MB | 2MB | 2MB | 1.5MB | 576KB | |
Max I/F (Intermediate Frequency) (MHz) | 10 | 10 | 10 | 5 | 5 | |
Max real sampling rate (Msps) | 25 | 25 | 25 | 12.5 | 12.5 | |
Max complex sampling rate (Msps) | 12.5 | 12.5 | 12.5 | 6.25 | 6.25 | |
Device Security(2) | Yes | Yes | Yes | Yes | — | |
Processors | ||||||
MCU (Arm Cortex-R4F) | Yes | Yes | Yes | Yes | Yes | |
DSP (C674x) | Yes | Yes | Yes | Yes | — | |
Peripherals | ||||||
Serial Peripheral Interface (SPI) ports | 2 | 2 | 2 | 2 | 1 | |
Quad Serial Peripheral Interface (QSPI) | Yes | Yes | Yes | Yes | Yes | |
Inter-Integrated Circuit (I2C) interface | 1 | 1 | 1 | 1 | 1 | |
Controller Area Network (DCAN) interface | — | 1 | 1 | 1 | 1 | |
Controller Area Network (CAN-FD) interface | 2 | 1 | 1 | 1 | — | |
Trace | Yes | Yes | Yes | Yes | — | |
PWM | Yes | Yes | Yes | Yes | — | |
Hardware In Loop (HIL/DMM) | Yes | Yes | Yes | Yes | — | |
GPADC | Yes | Yes | Yes | Yes | Yes | |
LVDS/Debug(3) | Yes | Yes | Yes | Yes | Yes | |
Hardware accelerator | Yes | Yes | Yes | — | Yes | |
1-V bypass mode | Yes | Yes | Yes | Yes | Yes | |
JTAG | Yes | Yes | Yes | Yes | Yes | |
Product status | Product Preview (PP), Advance Information (AI), or Production Data (PD) |
PD(5) | PD(5) | PD(5) | PD(5) | PD(5) |
For information about other devices in this family of products or related products see the links that follow.
Figure 5-1 shows the pin locations for the 180-pin 15 × 15 mm FCBGA package.