SWRU553A September   2019  – February 2020 AWR1243 , AWR2243

 

  1.   AWRx Cascaded Radar RF Evaluation Module (MMWCAS-RF-EVM)
    1.     Trademarks
    2. 1 Getting Started
      1. 1.1 Introduction
      2. 1.2 EVM Revisions
      3. 1.3 Key Features
      4. 1.4 What is Included
        1. 1.4.1 Kit Hardware Contents
        2. 1.4.2 mmWave Studio and Matlab Post Processing
    3. 2 Hardware Description
      1. 2.1 Block Diagram
      2. 2.2 Attaching the MMWAVCAS-RF-EVM to the MMWAVCAS-DSP-EVM
      3. 2.3 Power Status LED Indicators
      4. 2.4 Reset LED Indicators
      5. 2.5 Connectors
        1. 2.5.1 Host Board Connectors(J4, J5)
        2. 2.5.2 Bench Power Connector(J6)
        3. 2.5.3 20 GHz LO Debug Connector (J3)
        4. 2.5.4 AWR OSC_CLKOUT Debug Header (J2)
        5. 2.5.5 AWR Debug Headers (J1_1, J1_2, J1_3, J1_4)
      6. 2.6 Antennas
        1. 2.6.1 TX and RX Antenna Arrays
        2. 2.6.2 PCB Antenna Element
          1. 2.6.2.1 RX Antenna Element Performance
          2. 2.6.2.2 TX Antenna Element Performance
        3. 2.6.3 Virtual Antenna Array
    4. 3 Design Files and Software Tools
      1. 3.1 Hardware Collateral
      2. 3.2 Software, Development Tools, and Example Codes for MMWCAS-RF-EVM
      3. 3.3 Critical AWRx Setup Notes
        1. 3.3.1 LDO Bypass Requirement
    5. 4 PCB Dimensions and Mounting Information
    6. 5 PCB Storage and Handling Recommendations
    7. 6 References
    8. 7 Regulatory Information
  2.   Revision History

2 Hardware Description

Figure 2 and Figure 3 show the front and rear views of the evaluation board, respectively. The front (top layer) of the board primarily includes the AWRx devices and the embedded antenna arrays and 20 GHz LO splitters. The back (bottom layer) of the board primarily includes the host board connectors, power supplies (PMIC), most other support IC and most passives.

swru553-cascade-rf-design-spec-diagrams-front-layout-collouts.gifFigure 2. MMWAVCAS-RF-EVM Front View

Front View Callouts:

  1. AWRx #1 “Master” (U1_1)
  2. AWRx #2 “Slave 1” (U1_2)
  3. AWRx #4 “Slave 3” (U1_4)
  4. AWRx #3 “Slave 2” (U1_3)
  5. 20 GHz LO Wilkinson Power Divider #1 (FMCW_CLKOUT) AWR #1 and AWR #2
  6. 20 GHz LO Wilkinson Power Divider #2 (FMCW_SYNCOUT) AWR #3 and AWR #4
  7. LMK00804B (U4) AWRx 40 MHz clock distribution buffer
  8. Receive antenna array
  9. Transmit antenna array
  10. AWRx reset LED indicators
  11. System 5.0 V and 3.3 V power status indicators
swru553-cascade-rf-design-spec-diagrams-back-layout-collouts.gifFigure 3. MMWAVCAS-RF-EVM Back View

Back View Callouts:

  1. Host Board Connector #1 (J4) 5.0 V power, interfaces for AWRx #1, AWRx #2
  2. Host Board Connector #2 (J5) 5.0 V power, interfacesAWRx #3, AWRx #4
  3. LP87524P PMIC #2 (U4) powersAWRx #2 and AWRx #3
  4. LP87524P PMIC #1 (U3) powersAWRx #1 and AWRx #4
  5. TPS73733 5.0V to 3.3 V LDO (U5) provides system 3.3 V power
  6. Bench 5.0 V power connector (J6)
  7. LMK00804B (U8) AWRx digital synchronization distribution buffer