SWRU613A July   2023  – August 2024 AWRL1432 , IWRL1432

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1  XWRL1432BOOST Antenna
      1. 2.1.1 PCB Material
        1. 2.1.1.1 Transmitter and Receiver Virtual Array
    2. 2.2  EVM Mux Block Diagram
    3. 2.3  Switch Settings
    4. 2.4  LEDs
    5. 2.5  Connectors
    6. 2.6  USB Connector
    7. 2.7  DCA1000 HD Connector
    8. 2.8  Booster Pack Connector for the LaunchPad Connectivity
    9. 2.9  CANFD Connector
    10. 2.10 LIN PHY Connection
    11. 2.11 I2C Connections
      1. 2.11.1 EEPROM
    12. 2.12 XDS110 Interface
    13. 2.13 Flashing the Board
    14. 2.14 DCA1000EVM Mode
      1. 2.14.1 RDIF Interface for Raw ADC Capture
    15. 2.15 PCB Storage and Handling Recommendations:
      1. 2.15.1 PCB Storage and Handling Recommendations
      2. 2.15.2 Higher Power Demanding Applications
  8. 3Software
    1. 3.1 Software, Development Tools, and Example Code
      1. 3.1.1 XWRL1432 Demo Visualization Getting Started
  9. 4Hardware Design Files
    1. 4.1 Schematics, PCB Layout and Bill of Materials (BOM)
    2. 4.2 EVM Design Database
  10. 5Additional Information
    1. 5.1 Trademarks
  11. 6References
    1. 6.1 TI E2E Community
  12. 7Revision History

2.3 Switch Settings

Figure 3-10 shows the part designators and positions of the switches (S1 and S4) on the XWRL1432BOOST.

xWRL1432BOOST S1 Switch for Various Mode SettingsFigure 2-10 S1 Switch for Various Mode Settings
xWRL1432BOOST S4 Switch for Various Mode Settings Figure 2-11 S4 Switch for Various Mode Settings

Figure 3-12 shows the different boot mode configurations for the device. xWRL1432 supports Application mode/ Functional mode, Device management mode/ QSPI flashing mode, and Debug modes. The mode (SOP) configurations shown below in Figure 3-12 must be exercised first. After the correct SOP mode is set, an nRESET must be issued to register the SOP setting. Figure 3-13 provides the switch position settings for the Muxed signals functionality.

SOP Mode PMIC_CLK_OUT, TDO Combination (S1.2, S1.1)
SOP_MODE1 Device Management Mode/ QSPI Flashing Mode 00
SOP_MODE2 Application mode/ Functional Mode 01
SOP_MODE4 Debug Mode 11

Figure 2-12 SOP Configuration

Reference Designator Switch ON Switch OFF
S1.1 SOP0 Pulled Up SOP0 Pulled Down
S1.2 SOP1 Pulled Up SOP1 Pulled Down
S1.3 LVDS LIN_RX, XDS_UARTA/CAN, NERROR_LED, WATCH_DOG_TP, RTC_CLK_IN_TP, HOST_CLK_TP
S1.4 XDS_RS232 DCA_LP_RS232
S1.5 CAN XDS_UARTA
S1.6 I2C, REG_MODE, LED_SW_GPIO SPI
S4.1 XDS_JTAG DCA_JTAG
S4.2 CAN PHY: Stand by Mode Disable CAN PHY: Stand by Mode Enable
S4.3 LIN PHY: Enable LIN PHY: Disable
S4.4 - -

Figure 2-13 Switch Settings