SWRU613A July   2023  – August 2024 AWRL1432 , IWRL1432

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1  XWRL1432BOOST Antenna
      1. 2.1.1 PCB Material
        1. 2.1.1.1 Transmitter and Receiver Virtual Array
    2. 2.2  EVM Mux Block Diagram
    3. 2.3  Switch Settings
    4. 2.4  LEDs
    5. 2.5  Connectors
    6. 2.6  USB Connector
    7. 2.7  DCA1000 HD Connector
    8. 2.8  Booster Pack Connector for the LaunchPad Connectivity
    9. 2.9  CANFD Connector
    10. 2.10 LIN PHY Connection
    11. 2.11 I2C Connections
      1. 2.11.1 EEPROM
    12. 2.12 XDS110 Interface
    13. 2.13 Flashing the Board
    14. 2.14 DCA1000EVM Mode
      1. 2.14.1 RDIF Interface for Raw ADC Capture
    15. 2.15 PCB Storage and Handling Recommendations:
      1. 2.15.1 PCB Storage and Handling Recommendations
      2. 2.15.2 Higher Power Demanding Applications
  8. 3Software
    1. 3.1 Software, Development Tools, and Example Code
      1. 3.1.1 XWRL1432 Demo Visualization Getting Started
  9. 4Hardware Design Files
    1. 4.1 Schematics, PCB Layout and Bill of Materials (BOM)
    2. 4.2 EVM Design Database
  10. 5Additional Information
    1. 5.1 Trademarks
  11. 6References
    1. 6.1 TI E2E Community
  12. 7Revision History

RDIF Interface for Raw ADC Capture

The xWRL1432 doesn’t have LVDS I/Os, mainly to reduce the overall power consumption of the SOC. However, the DCA1000 board needs LVDS signals on the clock and data interface for raw ADC capture. For that reason CMOS to LVDS converters are used on the board as shown below. The data capture interface uses RDIF (Radar Data interface) for transferring the data between mmWave device and DCA1000 capture card. There is no change needed in the DCA1000 capture card for this purpose, however a new low power mmWave studio needs to be used for this purpose. The low power mmWave studio interprets the RDIF interface and provides a raw ADC data visualization platform for further signal processing.

xWRL1432BOOST DCA1000 CMOS TO LVDS Conversation for Data LinesFigure 2-25 DCA1000 CMOS TO LVDS Conversation for Data Lines
xWRL1432BOOST DCA1000 CMOS TO LVDS Conversation for Clock and Control LinesFigure 2-26 DCA1000 CMOS TO LVDS Conversation for Clock and Control Lines