SWRU629 September   2024

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 Wired Connections, Jumper Settings, Buttons, and LEDs
      1. 2.1.1  SWD Interface
      2. 2.1.2  I2C Connections
        1. 2.1.2.1 Default I2C Addresses
      3. 2.1.3  UART Signals
      4. 2.1.4  SD Card Interface
      5. 2.1.5  External Memory Interface
      6. 2.1.6  ADC Interface
      7. 2.1.7  Reset Pull-up Jumper
      8. 2.1.8  Push Buttons
      9. 2.1.9  LED Indicators
      10. 2.1.10 LaunchPad Header Pin Assignment
    2. 2.2 Power
      1. 2.2.1 VIO Selection
      2. 2.2.2 Measure the CC35xxE Current Draw
        1. 2.2.2.1 Low Current Measurement (LPDS)
        2. 2.2.2.2 Active Current Measurement
    3. 2.3 Clocking
    4. 2.4 Conducted RF Testing
    5. 2.5 Evaluation Setup
      1. 2.5.1 Wi-Fi Toolbox LP-EM-CC35X1 Hardware Setup
  7. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layouts
    3. 3.3 Bill of Materials (BOM)
  8. 4Additional Information
    1. 4.1 Trademarks

VIO Selection

The CC35xxE device features three Voltage IO rings (VIOs) for choosing the reference voltage of the various IOs. These three VIOs are VIO1, VIO2, and VDDSF. Each one the IO rings can be set to 1.8V or 3.3V independently of each other.

The LP-EM-CC35X1 features 2 jumpers (J10, J11) for easy voltage configuration for VIO1 and VIO2, either to 1.8V or 3.3V. By default both are set to 3.3V; see Figure 2-20.

LP-EM-CC35X1 VIO Jumpers Figure 2-20 VIO Jumpers

To set either VIO to 1.8V instead of 3.3V, place the jumper on the left two header pins. For example, VIO1 is set to 1.8V and VIO2 is set to 3.3V as shown in Figure 2-21.

LP-EM-CC35X1 VIO Selection Example Figure 2-21 VIO Selection Example

VDDSF IO ring controls the reference voltage of the xSPI signals to the external flash and PSRAM. For more information on VDDSF, see Section 2.1.5.

For the VIO selection of each GPIO, see Table 2-8.

Table 2-8 GPIO VIO Selection
LaunchPad Header Pin # Default Setting on LP-EM-CC35X1 CC35xx GPIO # IO Ring
1 3.3V N/A N/A
2 SLOW_CLK_IN GPIO0 VIO1
3 UART0 RX GPIO18 VIO1
4 UART0 TX GPIO17 VIO1
5 I2C1 Data GPIO10 VIO1
6 I2C1 CLK GPIO11 VIO1
7 SPI0 CLK GPIO27 VIO2
8 SPI1 CLK GPIO14 VIO1
9 I2C0 CLK, PDM Data0 GPIO33 VIO2
10 I2C0 Data, PDM BCLK GPIO32 VIO2
11 SPI1 POCI GPIO15 VIO1
12 SPI1 CS GPIO12 VIO1
13 SPI1 PICO GPIO13 VIO1
14 SPI0 POCI GPIO28 VIO2
15 SPI0 PICO GPIO29 VIO2
16 Reset N/A N/A
17 GPT1_1 GPIO30 VIO2
18 SPI0 CS GPIO26 VIO2
19 GPT1_3 GPIO2 VIO1
20 GND N/A N/A
21 5V N/A N/A
22 GND N/A N/A
23 ADC2 GPIO6 VIO1
24 ADC3 GPIO5 VIO1
25 ADC4 GPIO4 VIO1
26 ADC5 GPIO3 VIO1
27 I2S WCLK GPIO26 VIO2
28 I2S MCLK/BCLK GPIO29 VIO2
29 I2S Data0 GPIO30 VIO2
30 I2S Data1 GPIO31, GPIO35 VIO2
31 DCAN RX GPIO34 VIO2
32 DCAN TX GPIO30 VIO2
33 GPT0_1 GPIO35 VIO2
34 Logger N/A N/A
35 UART1 RX GPIO6 VIO1
36 UART1 TX GPIO5 VIO1
37 UART0 RTS GPIO16 VIO1
38 UART0 CTS GPIO19 VIO1
39 GPIO GPIO4 VIO1
40 N/A GPIO36 VIO1