SWRZ076D July   2018  – December 2020 CC1352P

 

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ADC_02

ADC samples can be delayed by 2 or 14 clock cycles (24 MHz) when XOSC_HF is turned on or off, resulting in sample jitter

Revisions Affected:

Revision E and earlier

Details:

There is no dedicated clock source selection for the ADC clock. The clock is derived from either XOSC_HF or RCOSC_HF, but defaults to XOSC_HF-derived clock whenever this is turned on.

When the ADC clock source is switched from RCOSC_HF to XOSC_HF-derived clock, the clock will stop for 2 cycles (24 MHz).

When the ADC clock source is switched from XOSC_HF-derived clock to RCOSC_HF-derived clock, the clock will stop for additionally 12 clock cycles, as the RCOSC_HF-derived clock is not ready when switch is done.

SCLK_HF switches from RCOSC_HF to XOSC_HF at different times compared to ADC clock. This leads to sample jitter.

Workaround 1:

Use asynchronous sampling

  • This will reduce the delay of 14 clock cycles down to 2 clock cycles.
  • Using asynchronous sampling and an external trigger source (GPIO input pin) will eliminate the delay completely

To use the ADC in asynchronous mode from the Sensor Controller:

Call adcEnableAsync()to enable the ADC, instead of adcEnableSync()

Example:

adcEnableAsync(ADC_REF_FIXED, ADC_TRIGGER_AUX_TIMER0);

To use the ADC in asynchronous mode from the System CPU, by using the ADCBuf driver:

ADCBuf_Params params;
ADCBufCC26X2_ParamsExtension paramsExtension;

ADCBuf_Params_init(&params);
ADCBufCC26X2_ParamsExtension_init(&paramsExtension);

paramsExtension.samplingMode = ADCBufCC26X2_SAMPING_MODE_ASYNCHRONOUS;
params.custom = &paramsExtension;

To use the ADC in asynchronous mode from the System CPU, by using DriverLib API:

Call AUXADCEnableAsync() to enable the ADC, instead of AUXADCEnableSync()

Example:

AUXADCEnableAsync(AUXADC_REF_FIXED, AUXADC_TRIGGER_GPT0A);

Please note the difference between the asynchronous and synchronous ADC modes:

  • In asynchronous mode, the ADC trigger ends the sampling period (which started immediately after the previous conversion), and starts conversion.
  • In synchronous mode, the ADC trigger starts the sampling period (with configurable duration), followed by conversion

Workaround 2:

Ensure that XOSC_HF is not turned on or off while the ADC is used.