SWRZ079D january   2018  – june 2023 CC2642R

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Advisories Matrix
  5. 2Nomenclature, Package Symbolization, and Revision Identification
    1. 2.1 Device and Development Support-Tool Nomenclature
    2. 2.2 Devices Supported
    3. 2.3 Package Symbolization and Revision Identification
  6. 3Advisories
    1.     Radio_03
    2.     Power_03
    3.     PKA_01
    4.     PKA_02
    5.     I2C_01
    6.     I2S_01
    7.     CPU_01
    8.     CPU_02
    9.     CPU_03
    10.     CPU_Sys_01
    11.     Sys_01
    12.     Advisory Sys_05
    13.     SYSCTRL_01
    14.     SRAM_01
    15.     GPTM_01
    16.     ADC_01
    17.     ADC_02
    18.     ADC_03
    19.     ADC_04
    20.     ADC_05
  7. 4Revision History

Advisory Sys_05

Elevated power-on-reset (POR) threshold voltage at low operating temperatures.

Revisions Affected:

Revision F and earlier

Details:

When powering up the device from 0 V at below 0 °C, the POR circuit might not release reset before VDDS has reached 2.3 V instead of 1.8 V. After POR has released the reset, an affected device can continue to operate at voltages down to 1.8 V.

Workaround:

Workaround 1: Power-up the device at VDDS > 2.3V when operating at temperatures below 0°C.

or

Workaround 2: Power-up the device at VDDS < 2.3V AND trigger the Reset pin from a host MCU or external circuitry once VDDS reaches 1.8V.

In addition, when operating the device in external regulator mode, workaround 2 must be implemented. Please note that VDDS must not exceed 1.95V in external regulator mode. This is applicable only to devices that have external regulator mode support.