SWRZ117 June   2022 CC2652PSIP

 

  1.   Abstract
  2.   Trademarks
  3. 1Advisories Matrix
  4. 2Nomenclature, Package Symbolization, and Revision Identification
    1. 2.1 Device and Development Support-Tool Nomenclature
    2. 2.2 Devices Supported
    3. 2.3 Package Symbolization and Revision Identification
  5. 3Advisories
    1.     Advisory Power_03
    2.     Advisory PKA_01
    3.     Advisory PKA_02
    4.     Advisory I2C_01
    5.     Advisory I2S_01
    6.     Advisory CPU_01
    7.     Advisory CPU_02
    8.     Advisory CPU_03
    9.     Advisory CPU_Sys_01
    10.     Advisory Sys_01
    11. 3.1 Sys_05
    12.     Advisory SYSCTRL_01
    13.     IOC_01
    14.     SRAM_01
    15.     GPTM_01
    16.     ADC_01
    17.     ADC_02
    18.     ADC_03
    19.     ADC_04
    20.     ADC_05
  6. 4Revision History

GPTM_01

An Incorrect Value Might Be Written to the General-Purpose (GP) Timers MMRs (Memory Mapped Registers) When Simultaneously Accessing the PKA (Public Key Accelerator) Engine and/or the AES (Advanced Encryption Standard) Engine from a Different Controller

Revisions Affected:

Revision F

Details:

When writing data to the GP Timer MMRs from one controller while simultaneously accessing the PKA/AES modules from another controller (read/write), an incorrect value might be captured in the GP Timer MMRs. In some cases, the incorrect value is replaced by the correct one after two clock cycles, but not always. No issue is seen when accessing the modules from the same controller.

Workaround 1:

Avoid accesses to PKA/AES by other controllers while writing to the GP Timer MMRs. This can be accomplished by acquiring the relevant semaphores (depending on drivers/stacks) before writing to the GP Timer.

Workaround 2:

Verify the value written to the GP Timer MMR by reading it back in software. Correct the value if necessary.