SWRZ131B September   2022  – June 2024 CC1354R10

 

  1.   1
  2.   Trademarks
  3. 1Advisories Matrix
  4. 2Nomenclature, Package Symbolization, and Revision Identification
    1. 2.1 Device and Development Support-Tool Nomenclature
    2. 2.2 Devices Supported
    3. 2.3 Package Symbolization and Revision Identification
  5. 3Advisories
    1.     Radio_01
    2. 3.1 Radio_05
    3.     Power_03
    4.     PKA_01
    5.     PKA_02
    6.     I2C_01
    7.     I2S_01
    8.     CPU_Sys_01
    9. 3.2 CPU_04
    10.     Sys_01
    11.     SYSCTRL_01
    12.     IOC_01
    13.     ADC_02
    14.     Flash_02
  6. 4Revision History

Advisories Matrix

Table 1-1 lists all advisories, modules affected, and the applicable silicon revisions.

Table 1-1 Advisories Matrix
MODULE DESCRIPTION SILICON REVISIONS AFFECTED
C
Radio Advisory Radio_01 — Proprietary radio modes: spurious emissions can affect regulatory compliance Yes
Radio Advisory Radio_05 — Zigbee has a negative 3dB RSSI offset error with internal bias Yes
Power Advisory Power_03 — Increased voltage ripple at low supply voltages when DC/DC converter is enabled. Yes
PKA Advisory PKA_01 — Public key accelerator (PKA) interrupt line is always high when module is enabled and PKA is idle. Yes
PKA Advisory PKA_02 — Public key accelerator (PKA) RAM is not byte accessible. Yes
I2C Advisory I2C_01 — I2C module master status bit is set late. Yes
I2S Advisory I2S_01 — I2S bus faults are not reported. Yes
CPU, System Advisory CPU_Sys_01 — The SysTick calibration value (register field CPU_SCS.STCR.TENMS) used to set up 10-ms periodic ticks is incorrect when the system CPU is running off divided down 48MHz clock. Yes
CPU Advisory CPU_04 — The Instrumentation Trace Macrocell (ITM) and Data Watchpoint and Trace (DWT) are active only if an external debug probe is attached to the JTAG port of the device. Yes
System Advisory Sys_01 — Device might boot into ROM serial bootloader when waking up from shutdown Yes
System Controller Advisory SYSCTRL_01 — Resets occurring in a specific 2MHz period during initial power up are incorrectly reported Yes
IO Controller Advisory IOC_01 — Limited number of DIOs available for the bootloader backdoor Yes
ADC Advisory ADC_02 — ADC samples can be delayed by two or 14 clock cycles (24MHz) when XOSC_HF is turned on or off, resulting in sample jitter. Yes
Flash Advisory Flash_02 — Flash bank erase may timeout when operating at low temperatures with a low VDDS supply voltage. Yes