SWRZ138A July   2023  – August 2024 AWRL1432

 

  1.   1
  2. 1Introduction
  3. 2Device Nomenclature
  4. 3Device Markings
  5. 4Advisory to Silicon Variant / Revision Map
  6. 5Known Design Exceptions to Functional Specifications
    1. 5.1  ANA #51
    2. 5.2  ANA #52
    3. 5.3  DIG #1
    4. 5.4  DIG #2
    5. 5.5  DIG #3
    6. 5.6  DIG #4
    7. 5.7  DIG #5
    8. 5.8  DIG #6
    9. 5.9  DIG #7
    10. 5.10 DIG #8
    11. 5.11 DIG #9
    12. 5.12 DIG #10
    13. 5.13 DIG #14
    14. 5.14 DIG #15
    15. 5.15 DIG #16
  7. 6Trademarks
  8.   Revision History

5.3 DIG #1

ePWM: Glitch during Chopper mode of operation

Revision(s) Affected

AWRL1432ES1.1, ES2.0

Details

During chopper mode operation, a glitch may be observed on the ePWMA and ePWMB output signals from the ePWM module.

Workaround

If the use case is impacted by a glitch, it is recommended to disable the PWM chopper control function by setting the LPRADAR:APP_PWM:PCCTL:CHPEN register bit to 0.

The below table shows the Register Address for above workaround.

Bits

Name

Address

0

 LPRADAR:APP_PWM:PCCTL:CHPEN 0X57F7 FC3C