SWRZ166 November 2024 AWR2944P
Potential system hang when Cortex R5 AXI Initiator Port across subsystem boundaries.
AWR2944P, AWR2E44P
When the MSS Cortex R5 initiates transfer on its AXI interface and crosses a subsystem boundary that is neither cacheable nor strongly ordered, it may lead to a system hang. This issue arises from a corner case in the AXI2VBUS bridge, which does not comply with the alignment protocol necessary for communication between subsystem bridges.