TIDT328
april 2023
1
Description
Features
Applications
1
Test Prerequisites
1.1
Voltage and Current Requirements
1.2
Considerations
1.3
Dimensions
2
Testing and Results
2.1
Efficiency Graphs
2.2
Load Regulation
2.3
Thermal Images
2.3.1
Unmodulated 60 VDC - Output
2.3.2
60 VAC - Output Modulated With 120-Hz Sinus (0 V – 5 V)
2.3.3
Conclusion
2.4
Bode Plot at Maximum Duty Cycle
3
Waveforms
3.1
Switching
3.1.1
Transistor Q1 Operating in Deep DCM
3.1.1.1
Drain to Source
3.1.1.2
Gate to Source
3.1.2
Diode D3 (Referenced to VOUT)
3.2
Output Voltage Ripple
3.3
Input Voltage Ripple
3.4
Start-Up Sequence
3.5
Shutdown Sequence
A Modulating the Output Voltage
A.1 Revision B
A.1.1 Bode Plot
A.1.2 Simulation
A.1.3 Measured Waveforms
A.1.3.1 Sinus 40 Hz
A.1.3.2 Sinus 100 Hz
A.1.3.3 Sawtooth 1
A.1.3.4 Sawtooth 2
A.1.3.5 Pure Triangle
A.1.3.6 Conclusion
A.2 Revision C
A.2.1 Bode Plot
A.2.2 Measured Waveforms
A.2.2.1 Sinus 120 Hz
A.2.2.2 Sawtooth 1
A.2.2.3 Sawtooth 2
A.2.2.4 Pure Triangle
A.2.3 Analysis Capacitor 1 µF, 100 V, X7R, 1206
A.2.3.1 DC-Bias
A.2.3.2 Resistance (ESR)
A.2.3.3 Reactance
A.2.3.4 Impedance
1.1
Voltage and Current Requirements
Table 1-1 Voltage and Current Requirements
Parameter
Specifications
Input Voltage Range
8 V – 16 V (12 V nominal), load dump up to 36 V
PK
Output Voltage
60 V
AC
with DC Offset
Output Current
0.3 A
MAX
Switching Frequency
100 kHz
Topology
DCM SEPIC
IC
LM51561-Q1