TIDT357 November   2023

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5. 1Power Requirements
    1.     6
    2.     7
    3. 1.1 Power-On Sequence
    4. 1.2 Power-Off Sequence
    5. 1.3 Required Equipment
    6. 1.4 Dimensions
  6. 2Testing and Results
    1. 2.1 Efficiency Graphs
    2. 2.2 Efficiency Data
    3. 2.3 Thermal Images
  7. 3Waveforms
    1. 3.1 Start-Up Sequence
    2. 3.2 Shutdown Sequence
    3. 3.3 Output Voltage Ripple
    4. 3.4 Load Transients

1.2 Power-Off Sequence

As described in the power-down sequencing section of the AM62Ax Sitara™ Processors data sheet, all power rails except VDD_CORE and VDDR_CORE can be ramped down independent of each other. If VDD_CORE is operating at 0.75 V, ramp down VDD_CORE after the 0.85 V VDDR_CORE. For the case where VDD_CORE and VDDR_CORE both run from a common 0.85-V supply, there is no ramp down requirement between them.

GUID-20230918-SS0I-VLP9-VXLH-ZNNXHRL9K8LK-low.png Figure 1-3 AM62x-Q1 Power-Off Sequence