IPFC DriveIn IPFC drive, three current
paths are very critical for PCB layout - High Power AC Loop, DC loop and
Gate Drive loop. These paths need to be short with maximum width possible to
reduce parasitic loop inductance.
- AC loop – Consists of
diode bridge (source), inductor and MOSFET drain and MOSFET Source
(return). On this loop, especially connection between inductor, MOSFET
Drain and Diode Anode handles high frequency and high power. Special
care has been taken while connecting this node to minimize parasitic
inductance by reducing distance and increasing copper area.
- DC loop – Consists of
diode bridge (source), inductor, diode, capacitor, load (return). To
distribute the rms current stress evenly, bank of electrolyte capacitor
should be placed optimally such electrical distance of each one from
diode cathode approximately remains same. This design uses copper plane
for VDC and PGND connection. To suppress high frequency
component metal film cap has been placed just next to Kathode of diode.
It minimizes the loop inductance significantly.
- Gate Drive loop –
Consists of driver power supply (source), gate driver IC, MOSFET Gate
and MOSFET source pin(return). This design uses parallel arrangement for
two phases of IPFC for minimizing other two AC/DC loops. Because of this
parallel arrangement, outer phase MOSFET Gate is inaccessible to gate
driver. An SMD insulated thick jumper has been used to connect the gate
driver signal to MOSFET gate.