TIDUCL0 January 2017
Figure 5 shows the schematic of the DRV8323 gate driver. C13 is the DVDD decoupling capacitor that must be placed close to the IC. PVDD is the DC supply input; in this case, it is the battery voltage of 18 V. A 4.7-μF capacitor (C10) is used as the PVDD capacitor. C11 and C12 are charge pump capacitors. The EN_GATE of DRV8323 is connected to the MCU. This helps the MCU to enable or disable the gate drive outputs of the DRV8323. For the voltage rating and selection of these capacitors, see the DRV8323 datasheet.