TIDUDG1
July 2022
Description
Resources
Features
Applications
5
1
System Description
2
System Overview
2.1
Block Diagram
2.2
Design Considerations
2.2.1
MIL-STD-1275E versus MIL-STD-1275D
2.2.2
Reverse Polarity Event
2.2.3
Voltage Spike Event
2.2.4
Voltage Spike Event: Component Selection
2.2.5
Voltage Surge Event
2.2.6
Voltage Surge Event: Component Selection
2.3
Highlighted Products
2.3.1
LM7480-Q1
2.3.2
LM5069
3
Hardware, Testing Requirements and Test Results
3.1
Hardware Requirements
3.2
Test Setup
3.3
Test Results
4
Design and Documentation Support
4.1
Design Files
4.1.1
Schematics
4.1.2
BOM
4.2
Documentation Support
4.3
Support Resources
4.4
Trademarks
Features
Two-stage 100-V surge suppression
First stage surge 100 V → 50 V handled by the LM7480-Q1
Second stage surge 50 V → 34 V handled by the LM5069
±250-V spike surge suppression
Reverse input protection down to –65 V