TIDUDO6B May 2019 – October 2020
The current consumption of the AFE4900 device depends on the sampling rate (for example, PTT mode at 1-kHz sampling rate for both ECG and PPG).
Typical specifications are at TA = 25°C; TX_SUP = 5 V, RX_SUP = 1.8 V (with CONTROL1 = 1.8 V to bypass internal LDOs), IO_SUP = 1.8 V, external clock mode with 32-kHz clock on CLK pin (period = tTE = 31.25 µs), the AFE operates with ULP mode enabled (ENABLE_ULP = 1); PPG: 1-kHz sampling rate, SAMP width of 3 × tTE, LED ON width of 4 × tTE, CF chosen such that there are 7-8 TIA time constants within the SAMP width, NUMAV = 1 (2 ADC averages), noise-reduction filter bandwidth set to 2.5 kHz, CIN = 100 pF (capacitor across the input pins to model the zero bias differential capacitance of the PD); ECG: 1-kHz sampling rate, INA gain of 12, chopper mode enabled (unless otherwise noted).
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
CURRENT CONSUMPTION | ||||||
RX_SUP current excluding switching current from I2C or SPI readout(5) | Low PRF PPG signal acquisition(3) | 50 | µA | |||
High PRF ECG, PPG signal acquisition(4) | 600 | |||||
Hardware power-down (PWDN) mode(2) | < 1 | |||||
Software power-down (PDNAFE) mode(2) | 15 | |||||
RX_SUP current resulting from switching current at I2C readout | At PRF of 50 Hz, readout with FIFO enabled with FIFO_PERIOD = 60, FIFO_NPHASE = 4(6) | 6 | µA | |||
Power-down mode | 0 | |||||
IO_SUP current | Low PRF, PPG signal acquisition(3) | 1 | µA | |||
High PRF, ECG, PPG signal acquisition(3) | 1 | |||||
Hardware power-down (PWDN) mode(2) | < 1 | |||||
Software power-down (PDNAFE) mode(2) | < 1 | |||||
TX_SUP current | Low PRF, PPG signal acquisition(3) | 4 | µA | |||
High PRF, ECG, PPG signal acquisition(4) | 20 | |||||
Hardware power-down (PWDN) mode(2)(1) | < 1 | |||||
Software power-down (PDNAFE) mode(2)(1) | < 1 | |||||
DIGITAL INPUTS | ||||||
VIH | High-level input voltage | Digital inputs except CONTROL1, I2C_SPI_SEL | 0.9 × IO_SUP | IO_SUP | V | |
CONTROL1 and I2C_SPI_SEL(7) | 0.85 × RX_SUP | RX_SUP | ||||
VIL | Low-level input voltage | Digital inputs except CONTROL1, I2C_SPI_SEL | 0 | 0.1 × IO_SUP | V | |
CONTROL1 and I2C_SPI_SEL(7) | 0 | 0.1 × RX_SUP | ||||
DIGITAL OUTPUTS | ||||||
VOH | High-level output voltage | IO_SUP | V | |||
VOL | Low-level output voltage | 0 | V |
The TX_SUP current is taken to be 3 mA at normal operating conditions (10% duty cycle for 100 mA) – worst case.
Over operating free-air temperature range (unless otherwise noted).
PARAMETER(1)(2) | MIN | MAX | UNIT | |
---|---|---|---|---|
Supply voltage range | RX_SUP to GND LDO bypassed | –0.3 | 2.1 | V |
RX_SUP to GND LDO enabled(3) | –0.3 | 4 | ||
IO_SUP to GND | –0.3 | Min [4,(RX_SUP+0.3)] | ||
TX_SUP to GND | –0.3 | 6 | ||
Voltage applied to analog inputs | Max [–0.3, (GND – 0.3)] | Min [4.0, (RX_SUP + 0.3)] | V | |
Voltage applied to digital inputs | Max [–0.3, (GND – 0.3)] | Min [4.0, (IO_SUP + 0.3)] | V | |
Maximum duty cycle (cumulative): sum of all LED phase durations as a function of the total period | 50-mA LED current | 10% | ||
100-mA LED current | 3% | |||
200-mA LED current | 1% | |||
Junction temperature, TJ | 105 | °C | ||
Storage temperature, Tstg | –60 | 150 | °C |
The RX_SUP and IO_SUP current are taken to be 700 µA (600 µA + 10 µA (I/O) + 50 µA (LDO enabled) + 40 µA (buffer)).