TIDUDT0 September   2022

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 Key System Specification
      1. 1.1.1 Intel® Stratix® 10 Power Tree Example
      2. 1.1.2 Intel® Agilex™ Power Tree Example
      3. 1.1.3 Xilinx Versal™ Power Tree Example
      4. 1.1.4 Xilinx Virtex-7® Power Tree Example
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
    3. 2.3 Highlighted Products
      1. 2.3.1 TPS53688
      2. 2.3.2 TPS650861
      3. 2.3.3 TPSM5D1806
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware Requirements
    2. 3.2 Test Setup
      1. 3.2.1 TPS53688 Programming Setup
      2. 3.2.2 TPS53688 Transient Test Setup
      3. 3.2.3 TPS650861 Programming Setup
      4. 3.2.4 TPS650861 and TPSM5D1806 Transient Test Setup
    3. 3.3 Test Results
      1. 3.3.1 Efficiency Results
      2. 3.3.2 Transient Results
        1. 3.3.2.1 TPS53688 Transient Results
        2. 3.3.2.2 TPS650861 Transient Results
        3. 3.3.2.3 TPSM5D1806 Transient Results
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Tools and Software
    3. 4.3 Documentation Support
    4. 4.4 Support Resources
    5. 4.5 Trademarks
  10. 5About the Author

1.1.1 Intel® Stratix® 10 Power Tree Example

Table 1-1 Intel® Stratix® 10 Power Tree Example
PARAMETER LOAD CAPABILITY RAIL NAME (SEQUENCE)
Input Power Supply

Voltage

12 V

N/A
TPS53688

Phase A (Six Phases)

0.85 V

136 A

VCC(1)

Phase B (Two Phases)

1 V

50 A

VCCT, VCCR (2)
TPSM5D1806

Two-phase configuration

5 V

10 A

5-V Intermediate (1)
TPS650861

Buck Controller 1

0.9 V

15 A

VCCERAM, VCCPLLDIG (2)

Buck Controller 2

1.8 V

20 A

VCCH (3)

Buck Controller 6

1.2 V

20 A

DDR (4)

VTT LDO

0.6 V

1.8A

DDR VTT (4)

Buck Converter 3

1.8 V

3 A

VCCIO (4)

Buck Converter 4

2.5 V

3 A

V2P5 (4)

Buck Converter 5

1.2 V

3 A

V1P2(4)

LDOA1

3 V

0.02 A

VCCIO3V(4)
Figure 1-1 Intel® Stratix® 10 Power Tree Example 10 Power Tree and Rail Assignment