TIDUDT0
September
2022
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Description
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Resources
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Features
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Applications
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5
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1System Description
- 1.1
Key System Specification
- 1.1.1
Intel® Stratix® 10 Power Tree Example
- 1.1.2
Intel® Agilex™ Power Tree Example
- 1.1.3
Xilinx Versal™ Power Tree Example
- 1.1.4
Xilinx Virtex-7® Power Tree Example
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2System Overview
- 2.1
Block Diagram
- 2.2
Design Considerations
- 2.3
Highlighted Products
- 2.3.1
TPS53688
- 2.3.2
TPS650861
- 2.3.3
TPSM5D1806
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3Hardware, Software, Testing Requirements, and Test Results
- 3.1
Hardware Requirements
- 3.2
Test Setup
- 3.2.1
TPS53688 Programming Setup
- 3.2.2
TPS53688 Transient Test Setup
- 3.2.3
TPS650861 Programming Setup
- 3.2.4
TPS650861 and TPSM5D1806 Transient Test
Setup
- 3.3
Test Results
- 3.3.1
Efficiency Results
- 3.3.2
Transient Results
- 3.3.2.1
TPS53688 Transient Results
- 3.3.2.2
TPS650861 Transient Results
- 3.3.2.3
TPSM5D1806 Transient Results
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4Design and Documentation Support
- 4.1
Design Files
- 4.1.1
Schematics
- 4.1.2
BOM
- 4.2
Tools and Software
- 4.3
Documentation Support
- 4.4
Support Resources
- 4.5
Trademarks
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5About the Author
4.3 Documentation Support
- Texas Instruments, TPS53688 Dual-Channel, 8-phase step-down, digital multiphase D-CAP+™
controller with VR13.HC SVID and PMBus product page
- Texas Instruments, CSD95410RRB 90-A peak continuous
synchronous buck NexFET™ smart power stage product page
- Texas Instruments, TPS650861 Programmable
Multirail PMU for Multicore Processors, FPGAs, and
Systems data sheet
- Texas Instruments, TPSM5D1806 4.5-V to 15-V
Input, Dual 6-A / Single 12-A Output Power
Module data sheet
- Texas Instruments, TPS65086100 Non-Volatile
Memory Programming Guide