TIDUE53I march 2018 – july 2023 TMS320F28P550SJ , TMS320F28P559SJ-Q1
Table 3-3 details the key controller peripherals used for control of the power stage on the board and Table 3-4 lists the key connectors and functions.
Pin Number | DESCRIPTION | SOFTWARE NAME |
---|---|---|
15, 31, 28 | Grid Voltage Sense Phase A, B, C | TINV_VGRID_A, B, C |
21, 33, 30 | Inverter Side Voltage Phase A, B, C | TINV_VINV_A, B, C |
25, 37, 34 | Inverter Side Current Phase A | TINV_IINV_A, B, C |
42 | Bus Voltage Sensing | TINV_VBUS |
40 | Bus Voltage Mid Point Sensing | TINV_VBUS_MID |
12, 14, 18, 20 | Temperature A, B, C and Ambient | TINV_TEMP_A, B, C, AMB |
49, 50, 58 | Q1 PWM Phase A, B, C | TINV_Q1_A, B, C |
51, 52, 60 | Q3 PWM Phase A, B, C | TINV_Q3_A, B, C |
53, 54, 62 | Q2 PWM Phase A, B, C | TINV_Q2_A, B, C |
99, 103, 107 | SDFM Data IG A, B, C | TINV_IGRID_A, B, C |
101, 105, 109 | SDFM Clock IG A, B, C | |
57, 75 | SDFM Clock Source | |
89, 87 , 85 | SiC Fault Signal A, B, C (active Low) | TINV_FAULT_A, B, C |
86, 88, 90, 92 | Relay on A, B, C, N | TINV_RELAY_A, B, C, N |
61, 63 | Gate driver supply PWM | TINV_GATE_DRIVE |
59 | Control GPIO for FAN | TINV_FAN |
108, 110 | These pins are used to see ISR nesting and so forth, on the docking station while starting firmware debug | TINV_PROFILING1,2 |
95 | Gate driver enable | TNV_PWM_EN |
81 | Gate driver Reset | TINV_R |
CONNECTOR NAME | FUNCTION |
---|---|
J1, J2 | DC+ and DC– terminals |
J3, J4, J31, J32 | Phases A, B, C and neutral terminals |
J33 | 24-V auxiliary power supply |
J34 | Jumper for auxiliary power supply |
J5, J13 | HSEC control card connector slot |
J23, J7, J17, J14, J20 | Phase A gate driver card connector slot |
J24, J15, J21, J9, J18 | Phase B gate driver card connector slot |
J25, J16, J22, J12, J19 | Phase C gate driver card connector slot |
The following lists shows the hardware changes to TIDA-01606 - REV-6.