TIDUE73A April   2018  – November 2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 C2000 Real-Time MCU LaunchPad
      2. 2.2.2 SN65HVD78
      3. 2.2.3 TLV702
      4. 2.2.4 TPS22918-Q1
    3. 2.3 Design Considerations
      1. 2.3.1 BiSS-C Protocol
        1. 2.3.1.1 Line Delay Compensation
        2. 2.3.1.2 Processing Time Request by Encoder
        3. 2.3.1.3 Control Communication
      2. 2.3.2 C2000 BiSS-C Encoder Interface Overview
      3. 2.3.3 TIDM-1010 Board Implementation
      4. 2.3.4 MCU Resource Requirements
        1. 2.3.4.1 Input, Output Signals, and CLB Tiles
      5. 2.3.5 CLB BiSS-C Implementation Details
        1. 2.3.5.1 Transaction Waveforms
        2. 2.3.5.2 FRAME_STATE Generation
        3. 2.3.5.3 CLB_SPI_CLOCK Generation
        4. 2.3.5.4 ENCODER_CLOCK (MA) Generation
      6. 2.3.6 PM BiSS-C Interface Library
        1. 2.3.6.1 PM BiSS-C Library Functions
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware
      1. 3.1.1 TIDM-1010 Jumper Configuration
    2. 3.2 Software
      1. 3.2.1 C2000 Driver Library (DriverLib)
      2. 3.2.2 C2000 SysConfig
      3. 3.2.3 C2000 Configurable Logic Block Tool
      4. 3.2.4 Installing Code Composer Studio™ and C2000WARE-MOTORCONTROL-SDK
      5. 3.2.5 Locating the Reference Software
    3. 3.3 Testing and Results
      1. 3.3.1 Hardware Configuration
      2. 3.3.2 Building and Loading Project
      3. 3.3.3 Running Example Code
      4. 3.3.4 Encoder Test
      5. 3.3.5 Benchmarks
      6. 3.3.6 Troubleshooting
  10. 4Design Files
  11. 5Software Files
  12. 6Related Documentation
    1.     Trademarks
  13. 7Terminology
  14. 8About the Authors
  15. 9Revision History

3.3.6 Troubleshooting

Examine the following waveforms can assist in troubleshooting. Refer to the I/O diagrams in the design description.

  • The CLB generated SPI clock. This is brought out on a test pin for observation.
  • The response from the encoder at the SPI input pin.
  • The response from the encoder (SL+/SL-) between the RS485 line driver and the encoder. Note: The data is a differential signal. Therefore, observation requires a special probe.
  • The TxEN signal. Confirm this singal remains low. BiSS-C design does not pull TxEN high.
  • The encoder clock (MA+/MA-) between the RS485 line driver and the encoder. Note: The data is a differential signal. Therefore, observation requires a special probe.
  1. If the MA signal is not transmitted:
    • Determine if the issue is before, or after, the RS485 line drivers.
    • Confirm that TxEN is held low if the issue is between the line drivers and the encoder.
  2. If the MA frequency is not as expected:
    • Check the BISSC_MA_CLOCK definition and BISSC_FREQ_DIVIDER definition in bissc.h
  3. If the encoder response is not seen:
    • Check the power connections to the encoder.
    • Check the power supply current against the encoder specifications.
    • Reduce the frequency of MA and try again. This can indicate a cable, or connector, issue.
    • Confirm that the cable design, and length, meets the requirements of the encoder manufacture.
    • Determine if the issue is before or after the RS485 line drivers.
  4. If the response waveform is observed, but not captured by the SPI:
    • This can occur if the CLB design was moved to a different tile or ported to a different device.
      • Check the SPI clock from the CLB. This clock is started when the CLB sees the response from the encoder. Confirm the internal XBAR connections properly route the response to both the SPI and the appropriate CLB input.
      • If the SPI clock is seen, confirm that the internal connection from the CLB output goes to the SPI instance used. This changes depending on the CLB tile used.