TIDUE73A April   2018  – November 2024

 

  1.   1
  2.   Description
  3.   Resources
  4.   Features
  5.   Applications
  6.   6
  7. 1System Description
    1. 1.1 Key System Specifications
  8. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Highlighted Products
      1. 2.2.1 C2000 Real-Time MCU LaunchPad
      2. 2.2.2 SN65HVD78
      3. 2.2.3 TLV702
      4. 2.2.4 TPS22918-Q1
    3. 2.3 Design Considerations
      1. 2.3.1 BiSS-C Protocol
        1. 2.3.1.1 Line Delay Compensation
        2. 2.3.1.2 Processing Time Request by Encoder
        3. 2.3.1.3 Control Communication
      2. 2.3.2 C2000 BiSS-C Encoder Interface Overview
      3. 2.3.3 TIDM-1010 Board Implementation
      4. 2.3.4 MCU Resource Requirements
        1. 2.3.4.1 Input, Output Signals, and CLB Tiles
      5. 2.3.5 CLB BiSS-C Implementation Details
        1. 2.3.5.1 Transaction Waveforms
        2. 2.3.5.2 FRAME_STATE Generation
        3. 2.3.5.3 CLB_SPI_CLOCK Generation
        4. 2.3.5.4 ENCODER_CLOCK (MA) Generation
      6. 2.3.6 PM BiSS-C Interface Library
        1. 2.3.6.1 PM BiSS-C Library Functions
  9. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Hardware
      1. 3.1.1 TIDM-1010 Jumper Configuration
    2. 3.2 Software
      1. 3.2.1 C2000 Driver Library (DriverLib)
      2. 3.2.2 C2000 SysConfig
      3. 3.2.3 C2000 Configurable Logic Block Tool
      4. 3.2.4 Installing Code Composer Studio™ and C2000WARE-MOTORCONTROL-SDK
      5. 3.2.5 Locating the Reference Software
    3. 3.3 Testing and Results
      1. 3.3.1 Hardware Configuration
      2. 3.3.2 Building and Loading Project
      3. 3.3.3 Running Example Code
      4. 3.3.4 Encoder Test
      5. 3.3.5 Benchmarks
      6. 3.3.6 Troubleshooting
  10. 4Design Files
  11. 5Software Files
  12. 6Related Documentation
    1.     Trademarks
  13. 7Terminology
  14. 8About the Authors
  15. 9Revision History

2.3.4.1 Input, Output Signals, and CLB Tiles

This section describes the input or output and CLB tile connections used on the P65x device. When porting to another device, different routing or signal usage is sometimes required.

  1. The specific GPIO pins and SPI module used depend on the device-specific LaunchPad pinout.
  2. The connections into, and out of, the CLB depend on the features of that device and the pin. For example using a device INPUTXBAR instead of a CLB_INPUTXBAR.
  3. The specific CLB tile instances depend on the capability of the tile to override other signals such as the SPICLK. For example, if SPI-D is used, then the design is best implemented on the tile that has access to SPI-D directly.

Note: In the input/output diagram:
  • Letters in a colored circle indicates an off-page connection within a CLB tile diagram in a following section.
  • Letters followed by _RE indicate rising edge. For example: D is the encoder clock. D_RE is the same signal after the CLB's rising edge filter is applied.
  • G is an output from a finite state machine and referred to as the FRAME_STATE. G consists of two state signals: G.s0 and G.s1.
TIDM-1010 F28P65 Input, Output, and CLB Usage for BOOSTXL_POSMGR Figure 2-10 F28P65 Input, Output, and CLB Usage for BOOSTXL_POSMGR